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| author | Chris Lattner <sabre@nondot.org> | 2007-12-16 20:26:54 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2007-12-16 20:26:54 +0000 |
| commit | 48b0133b8393ca3ff09bc1c55250eb11d4bcaf04 (patch) | |
| tree | 2b76d9f71f384ee3669cd17c6ee552ed7879041d | |
| parent | d7610e16fc1490f2a3a16a68f5059fd34196fbc9 (diff) | |
fix a questionable cast, thanks to Mike Stump for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45075 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index ed1df4dc2c..79aaaebb01 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -5302,7 +5302,7 @@ SDOperand X86TargetLowering::LowerTRAMPOLINE(SDOperand Op, Disp = DAG.getNode(ISD::SUB, MVT::i32, FPtr, Addr); unsigned char MOV32ri = TII->getBaseOpcodeFor(X86::MOV32ri); - unsigned char N86Reg = ((X86RegisterInfo&)RegInfo).getX86RegNum(NestReg); + unsigned char N86Reg = ((X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg); OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8), Trmp, TrmpSV->getValue(), TrmpSV->getOffset()); |