diff options
| author | Chris Lattner <sabre@nondot.org> | 2008-01-05 05:28:30 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-01-05 05:28:30 +0000 |
| commit | 3b5a221f815f66775ee58f0e3bd8205cdf4288b2 (patch) | |
| tree | 2bfcf4ae0d41adf50afafc0699df22cdb1c4924f | |
| parent | a83b34bbebe9c251cce72a91f48be9d75a4450b4 (diff) | |
simplify some code by using shorter accessors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45622 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 3d876c2837..3818836914 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -135,11 +135,13 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const { case X86::MMX_MOVD64rm: case X86::MMX_MOVQ64rm: // Loads from constant pools are trivially rematerializable. - return MI->getOperand(1).isRegister() && MI->getOperand(2).isImmediate() && - MI->getOperand(3).isRegister() && MI->getOperand(4).isConstantPoolIndex() && - MI->getOperand(1).getReg() == 0 && - MI->getOperand(2).getImm() == 1 && - MI->getOperand(3).getReg() == 0; + if (MI->getOperand(1).isReg() && MI->getOperand(2).isImm() && + MI->getOperand(3).isReg() && MI->getOperand(4).isCPI() && + MI->getOperand(1).getReg() == 0 && + MI->getOperand(2).getImm() == 1 && + MI->getOperand(3).getReg() == 0) + return true; + return false; } // All other instructions marked M_REMATERIALIZABLE are always trivially // rematerializable. @@ -161,10 +163,8 @@ bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const { // Loads from global addresses which aren't redefined in the function are // side effect free. if (Reg != 0 && MRegisterInfo::isVirtualRegister(Reg) && - MI->getOperand(2).isImmediate() && - MI->getOperand(3).isRegister() && - MI->getOperand(4).isGlobalAddress() && - MI->getOperand(2).getImm() == 1 && + MI->getOperand(2).isImm() && MI->getOperand(3).isReg() && + MI->getOperand(4).isGlobal() && MI->getOperand(2).getImm() == 1 && MI->getOperand(3).getReg() == 0) return true; } @@ -181,14 +181,14 @@ bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const { case X86::MOVAPDrm: case X86::MMX_MOVD64rm: case X86::MMX_MOVQ64rm: - // Loads from constant pools have no side effects - return MI->getOperand(1).isRegister() && - MI->getOperand(2).isImmediate() && - MI->getOperand(3).isRegister() && - MI->getOperand(4).isConstantPoolIndex() && - MI->getOperand(1).getReg() == 0 && - MI->getOperand(2).getImm() == 1 && - MI->getOperand(3).getReg() == 0; + // Loads from constant pools are trivially rematerializable. + if (MI->getOperand(1).isReg() && MI->getOperand(2).isImm() && + MI->getOperand(3).isReg() && MI->getOperand(4).isCPI() && + MI->getOperand(1).getReg() == 0 && + MI->getOperand(2).getImm() == 1 && + MI->getOperand(3).getReg() == 0) + return true; + return false; } // All other instances of these instructions are presumed to have side |