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| author | Evan Cheng <evan.cheng@apple.com> | 2006-04-08 00:47:44 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-04-08 00:47:44 +0000 |
| commit | 372db540d94bd8604a66e99abbd6c4eb065bad16 (patch) | |
| tree | 627cf6f3fdfb6e981503022614cc687d6a5e0d34 | |
| parent | 85db0df76c76a446d3ab9f29e9d4e8216876e356 (diff) | |
ldmxcsr and stmxcsr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27506 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index f279c7b47f..c2dbeb5d95 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1538,9 +1538,13 @@ def MASKMOVQ : I<0xF7, MRMDestMem, (ops i64mem:$dst, VR64:$src), def SFENCE : I<0xAE, MRM7m, (ops), "sfence", []>, TB, Requires<[HasSSE1]>; -// Load MXCSR register +// MXCSR register def LDMXCSR : I<0xAE, MRM2m, (ops i32mem:$src), - "ldmxcsr {$src|$src}", []>, TB, Requires<[HasSSE1]>; + "ldmxcsr $src", + [(int_x86_sse_ldmxcsr addr:$src)]>, TB, Requires<[HasSSE1]>; +def STMXCSR : I<0xAE, MRM3m, (ops i32mem:$dst), + "stmxcsr $dst", + [(int_x86_sse_stmxcsr addr:$dst)]>, TB, Requires<[HasSSE1]>; //===----------------------------------------------------------------------===// // Alias Instructions |