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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-10-16 18:39:22 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-10-16 18:39:22 +0000 |
| commit | 27e469ef139e0b0b447360b0c37aeb0496b6d7d8 (patch) | |
| tree | c1ab15146fd01c5600c6928ce6f045d51afd8232 | |
| parent | a6f149d548bcd5f24f391fa0f9b196104db550dd (diff) | |
define the DFPBinOp class
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30981 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 25 |
1 files changed, 10 insertions, 15 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 64996923ba..cacff859af 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -56,6 +56,11 @@ class FPBinOp<string OpcStr, SDNode OpNode> : !strconcat(OpcStr, " $dst, $a, $b"), [(set FPRegs:$dst, (OpNode FPRegs:$a, FPRegs:$b))]>; +class DFPBinOp<string OpcStr, SDNode OpNode> : + InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b), + !strconcat(OpcStr, " $dst, $a, $b"), + [(set DFPRegs:$dst, (OpNode DFPRegs:$a, DFPRegs:$b))]>; + class Addr1BinOp<string OpcStr, SDNode OpNode> : InstARM<(ops IntRegs:$dst, IntRegs:$a, op_addr_mode1:$b), !strconcat(OpcStr, " $dst, $a, $b"), @@ -256,17 +261,10 @@ def FCVTSD : InstARM<(ops FPRegs:$dst, DFPRegs:$src), def FMSTAT : InstARM<(ops ), "fmstat", [(armfmstat)]>; // Floating Point Arithmetic -def FADDS : FPBinOp<"fadds", fadd>; - -def FADDD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b), - "faddd $dst, $a, $b", - [(set DFPRegs:$dst, (fadd DFPRegs:$a, DFPRegs:$b))]>; - -def FSUBS : FPBinOp<"fsubs", fsub>; - -def FSUBD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b), - "fsubd $dst, $a, $b", - [(set DFPRegs:$dst, (fsub DFPRegs:$a, DFPRegs:$b))]>; +def FADDS : FPBinOp<"fadds", fadd>; +def FADDD : DFPBinOp<"faddd", fadd>; +def FSUBS : FPBinOp<"fsubs", fsub>; +def FSUBD : DFPBinOp<"fsubd", fsub>; def FNEGS : InstARM<(ops FPRegs:$dst, FPRegs:$src), "fnegs $dst, $src", @@ -277,10 +275,7 @@ def FNEGD : InstARM<(ops DFPRegs:$dst, DFPRegs:$src), [(set DFPRegs:$dst, (fneg DFPRegs:$src))]>; def FMULS : FPBinOp<"fmuls", fmul>; - -def FMULD : InstARM<(ops DFPRegs:$dst, DFPRegs:$a, DFPRegs:$b), - "fmuld $dst, $a, $b", - [(set DFPRegs:$dst, (fmul DFPRegs:$a, DFPRegs:$b))]>; +def FMULD : DFPBinOp<"fmuld", fmul>; // Floating Point Load |