diff options
| author | Richard Osborne <richard@xmos.com> | 2008-11-17 17:34:31 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2008-11-17 17:34:31 +0000 |
| commit | 104de6cf7b80ec5e9beb502a069f376810a0a1e3 (patch) | |
| tree | c431dc740afc8e8addeaca74fc17bed1ce535a84 | |
| parent | 35fde150591d7c5f032a5e7c9643315e5f2bedde (diff) | |
Don't produce ADDC/ADDE when expanding SHL unless they are legal
for the target. This fixes PR3080.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59450 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/XCore/2008-11-17-Shl64.ll | 6 |
2 files changed, 8 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp index fb05f334c0..ddc339c324 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -1073,7 +1073,8 @@ void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt, } else if (Amt == NVTBits) { Lo = DAG.getConstant(0, NVT); Hi = InL; - } else if (Amt == 1) { + } else if (Amt == 1 && + TLI.isOperationLegal(ISD::ADDC, TLI.getTypeToExpandTo(NVT))) { // Emit this X << 1 as X+X. SDVTList VTList = DAG.getVTList(NVT, MVT::Flag); SDValue LoOps[2] = { InL, InL }; diff --git a/test/CodeGen/XCore/2008-11-17-Shl64.ll b/test/CodeGen/XCore/2008-11-17-Shl64.ll new file mode 100644 index 0000000000..97ea41b8d0 --- /dev/null +++ b/test/CodeGen/XCore/2008-11-17-Shl64.ll @@ -0,0 +1,6 @@ +; RUN: llvm-as < %s | llc -march=xcore > %t1.s +; PR3080 +define i64 @test(i64 %a) { + %result = shl i64 %a, 1 + ret i64 %result +} |