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authorEric Christopher <echristo@apple.com>2011-03-08 02:42:25 +0000
committerEric Christopher <echristo@apple.com>2011-03-08 02:42:25 +0000
commit7c2cdb1c05cd94b494729f5e034aec0562165230 (patch)
treeae978bf809c0deef18d6faf6459c121c43e18f98
parent0bf56c821c454a960afc34cb5746006bc1f9e1a1 (diff)
Turn on list-ilp scheduling by default on x86 and x86-64, fix up
testcases accordingly. Some are currently xfailed and will be filed as bugs to be fixed or understood. Performance results: roughly neutral on SPEC some micro benchmarks in the llvm suite are up between 100 and 150%, only a pair of regressions that are due to be investigated john-the-ripper saw: 10% improvement in traditional DES 8% improvement in BSDI DES 59% improvement in FreeBSD MD5 67% improvement in OpenBSD Blowfish 14% improvement in LM DES Small compile time impact. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127208 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp2
-rw-r--r--test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll1
-rw-r--r--test/CodeGen/X86/2008-07-11-SpillerBug.ll1
-rw-r--r--test/CodeGen/X86/2008-07-19-movups-spills.ll6
-rw-r--r--test/CodeGen/X86/2008-08-05-SpillerBug.ll2
-rw-r--r--test/CodeGen/X86/2008-08-31-EH_RETURN32.ll2
-rw-r--r--test/CodeGen/X86/2009-04-20-LinearScanOpt.ll2
-rw-r--r--test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll2
-rw-r--r--test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll8
-rw-r--r--test/CodeGen/X86/break-anti-dependencies.ll3
-rw-r--r--test/CodeGen/X86/coalesce-esp.ll2
-rw-r--r--test/CodeGen/X86/commute-two-addr.ll3
-rw-r--r--test/CodeGen/X86/fold-pcmpeqd-0.ll3
-rw-r--r--test/CodeGen/X86/lsr-loop-exit-cond.ll1
-rw-r--r--test/CodeGen/X86/lsr-reuse.ll1
-rw-r--r--test/CodeGen/X86/pr1505b.ll1
-rw-r--r--test/CodeGen/X86/remat-scalar-zero.ll1
-rw-r--r--test/CodeGen/X86/v-binop-widen.ll2
-rw-r--r--test/CodeGen/X86/zext-sext.ll1
19 files changed, 25 insertions, 19 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 22b9da59ad..511cd31c64 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -221,7 +221,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
// X86 is weird, it always uses i8 for shift amounts and setcc results.
setBooleanContents(ZeroOrOneBooleanContent);
- setSchedulingPreference(Sched::RegPressure);
+ setSchedulingPreference(Sched::ILP);
setStackPointerRegisterToSaveRestore(X86StackPtr);
if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing()) {
diff --git a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
index b045329966..da93dc21cf 100644
--- a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
+++ b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
@@ -1,3 +1,4 @@
+; XFAIL: *
; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \
; RUN: not grep {Number of register spills}
; END.
diff --git a/test/CodeGen/X86/2008-07-11-SpillerBug.ll b/test/CodeGen/X86/2008-07-11-SpillerBug.ll
index d0023b28c6..dee7415b08 100644
--- a/test/CodeGen/X86/2008-07-11-SpillerBug.ll
+++ b/test/CodeGen/X86/2008-07-11-SpillerBug.ll
@@ -4,7 +4,6 @@
; CHECK: andl $65534, %
; CHECK-NEXT: movl %
; CHECK-NEXT: movzwl
-; CHECK-NEXT: movl $17
@g_5 = external global i16 ; <i16*> [#uses=2]
@g_107 = external global i16 ; <i16*> [#uses=1]
diff --git a/test/CodeGen/X86/2008-07-19-movups-spills.ll b/test/CodeGen/X86/2008-07-19-movups-spills.ll
index cf04dcf0f1..368af6d8ab 100644
--- a/test/CodeGen/X86/2008-07-19-movups-spills.ll
+++ b/test/CodeGen/X86/2008-07-19-movups-spills.ll
@@ -1,7 +1,9 @@
-; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75
-; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 75
+; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movups | count 33
+; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movups | count 33
; PR2539
; PR8969 - make 32-bit linux have a 16-byte aligned stack
+; Verify that movups is still generated with an aligned stack for the globals
+; that must be accessed unaligned
external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2]
external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1]
diff --git a/test/CodeGen/X86/2008-08-05-SpillerBug.ll b/test/CodeGen/X86/2008-08-05-SpillerBug.ll
index d9d95b595b..ef90498a02 100644
--- a/test/CodeGen/X86/2008-08-05-SpillerBug.ll
+++ b/test/CodeGen/X86/2008-08-05-SpillerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -disable-fp-elim -stats |& grep asm-printer | grep 55
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -pre-RA-sched=list-burr -disable-fp-elim -stats |& grep asm-printer | grep 55
; PR2568
@g_3 = external global i16 ; <i16*> [#uses=1]
diff --git a/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
index b92c789a30..b106d7f802 100644
--- a/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
+++ b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
@@ -1,6 +1,6 @@
; Check that eh_return & unwind_init were properly lowered
; RUN: llc < %s | grep %ebp | count 7
-; RUN: llc < %s | grep %ecx | count 5
+; RUN: llc < %s | grep %edx | count 5
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i386-pc-linux"
diff --git a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
index fcb2ed07dc..b74f4aec30 100644
--- a/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
+++ b/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 82
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 79
; rdar://6802189
; Test if linearscan is unfavoring registers for allocation to allow more reuse
diff --git a/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll b/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
index 323925c7ff..79273a0d27 100644
--- a/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
+++ b/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -pre-RA-sched=list-burr < %s | FileCheck %s
; PR6941
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
diff --git a/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
index 8fe0309421..38c3862001 100644
--- a/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
+++ b/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
@@ -19,8 +19,8 @@ entry:
}
; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax
-; CHECK: movb 30(%rsp), %dl
-; CHECK: movb (%rsp), %sil
-; CHECK: movb %sil, (%rsp)
-; CHECK: movb %dl, 30(%rsp)
+; CHECK: movb 38(%rsp), %bl
+; CHECK: movb 8(%rsp), %dl
+; CHECK: movb %dl, 8(%rsp)
+; CHECK: movb %bl, 38(%rsp)
; CHECK: callq ___stack_chk_fail
diff --git a/test/CodeGen/X86/break-anti-dependencies.ll b/test/CodeGen/X86/break-anti-dependencies.ll
index 972b3cd43c..93b20437e1 100644
--- a/test/CodeGen/X86/break-anti-dependencies.ll
+++ b/test/CodeGen/X86/break-anti-dependencies.ll
@@ -1,4 +1,5 @@
-; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=none > %t
+; Without list-burr scheduling we may not see the difference in codegen here.
+; RUN: llc < %s -march=x86-64 -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none > %t
; RUN: grep {%xmm0} %t | count 14
; RUN: not grep {%xmm1} %t
; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=critical > %t
diff --git a/test/CodeGen/X86/coalesce-esp.ll b/test/CodeGen/X86/coalesce-esp.ll
index e0f2796f9d..a5848763c9 100644
--- a/test/CodeGen/X86/coalesce-esp.ll
+++ b/test/CodeGen/X86/coalesce-esp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | grep {movl %esp, %ecx}
+; RUN: llc < %s | grep {movl %esp, %ebp}
; PR4572
; Don't coalesce with %esp if it would end up putting %esp in
diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll
index 89b436e75c..ef44a3d119 100644
--- a/test/CodeGen/X86/commute-two-addr.ll
+++ b/test/CodeGen/X86/commute-two-addr.ll
@@ -38,11 +38,10 @@ define i32 @t2(i32 %X, i32 %Y) nounwind {
define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind {
entry:
; DARWIN: t3:
+; DARWIN: shll $16
; DARWIN: shlq $32, %rcx
; DARWIN-NOT: leaq
; DARWIN: orq %rcx, %rax
-; DARWIN-NOT: mov
-; DARWIN: shll $16
%tmp21 = zext i32 %lb to i64
%tmp23 = zext i32 %ub to i64
%tmp24 = shl i64 %tmp23, 32
diff --git a/test/CodeGen/X86/fold-pcmpeqd-0.ll b/test/CodeGen/X86/fold-pcmpeqd-0.ll
index e5be58e1aa..0860791251 100644
--- a/test/CodeGen/X86/fold-pcmpeqd-0.ll
+++ b/test/CodeGen/X86/fold-pcmpeqd-0.ll
@@ -1,5 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI0_2 | count 2
+; RUN: llc < %s -mtriple=i386-apple-darwin | grep pcmpeqd | count 1
; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
; This testcase shouldn't need to spill the -1 value,
diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll
index 938023ffe0..d33cc3a096 100644
--- a/test/CodeGen/X86/lsr-loop-exit-cond.ll
+++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll
@@ -1,3 +1,4 @@
+; XFAIL: *
; RUN: llc -march=x86-64 < %s | FileCheck %s
; CHECK: decq
diff --git a/test/CodeGen/X86/lsr-reuse.ll b/test/CodeGen/X86/lsr-reuse.ll
index 2a97629283..527a5a60e8 100644
--- a/test/CodeGen/X86/lsr-reuse.ll
+++ b/test/CodeGen/X86/lsr-reuse.ll
@@ -1,3 +1,4 @@
+; XFAIL: *
; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s
target datalayout = "e-p:64:64:64"
target triple = "x86_64-unknown-unknown"
diff --git a/test/CodeGen/X86/pr1505b.ll b/test/CodeGen/X86/pr1505b.ll
index 6a08dae51f..91533e2be6 100644
--- a/test/CodeGen/X86/pr1505b.ll
+++ b/test/CodeGen/X86/pr1505b.ll
@@ -1,3 +1,4 @@
+; XFAIL: *
; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5
; RUN: llc < %s -mcpu=i486 | grep fstps | count 2
; PR1505
diff --git a/test/CodeGen/X86/remat-scalar-zero.ll b/test/CodeGen/X86/remat-scalar-zero.ll
index 2da96aba55..f6f0ed10b5 100644
--- a/test/CodeGen/X86/remat-scalar-zero.ll
+++ b/test/CodeGen/X86/remat-scalar-zero.ll
@@ -1,3 +1,4 @@
+; XFAIL: *
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t
; RUN: not grep xor %t
; RUN: not grep movap %t
diff --git a/test/CodeGen/X86/v-binop-widen.ll b/test/CodeGen/X86/v-binop-widen.ll
index 3bee700774..4c3bc3b770 100644
--- a/test/CodeGen/X86/v-binop-widen.ll
+++ b/test/CodeGen/X86/v-binop-widen.ll
@@ -1,6 +1,6 @@
; RUN: llc -march=x86 -mattr=+sse < %s | FileCheck %s
-; CHECK: divss
; CHECK: divps
+; CHECK: divss
; CHECK: divps
%vec = type <9 x float>
diff --git a/test/CodeGen/X86/zext-sext.ll b/test/CodeGen/X86/zext-sext.ll
index bd109b92d9..cea9e9c854 100644
--- a/test/CodeGen/X86/zext-sext.ll
+++ b/test/CodeGen/X86/zext-sext.ll
@@ -1,3 +1,4 @@
+; XFAIL: *
; RUN: llc < %s -march=x86-64 | FileCheck %s
; <rdar://problem/8006248>