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authorAndrew Trick <atrick@apple.com>2011-03-05 09:18:16 +0000
committerAndrew Trick <atrick@apple.com>2011-03-05 09:18:16 +0000
commit5e84e3ccaa555bd48ecca384e93e55abd76fb40a (patch)
tree015f43fdcf2627b5ddc7e9d416ee10b21ed6f08a
parentece96f5713e14b705d415eb95fe57c5fff841626 (diff)
Fix for -sched-high-latency-cycles in sched=list-ilp mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127071 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index 25f0927a3c..67005d7e63 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -515,7 +515,9 @@ void ScheduleDAGSDNodes::ComputeLatency(SUnit *SU) {
}
if (!InstrItins || InstrItins->isEmpty()) {
- if (SU->getNode() && TII->isHighLatencyDef(SU->getNode()->getOpcode()))
+ SDNode *N = SU->getNode();
+ if (N && N->isMachineOpcode() &&
+ TII->isHighLatencyDef(N->getMachineOpcode()))
SU->Latency = HighLatencyCycles;
else
SU->Latency = 1;