diff options
| author | Chris Lattner <sabre@nondot.org> | 2004-02-10 20:25:13 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-02-10 20:25:13 +0000 |
| commit | 0bbf3052c23180c9a1ab3ded796a5319f62fa53d (patch) | |
| tree | ce197d45ffbdeaedbf61dd70bf63dc1d2f83a2fa | |
| parent | f62949677606425ecfc906dc97a0f9765b5999d8 (diff) | |
Tighten up checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11274 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index fc72ba3136..8911562bfc 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -42,8 +42,8 @@ bool X86InstrInfo::isNOPinstr(const MachineInstr &MI) const { // Make sure the instruction is EXACTLY `xchg ax, ax' if (MI.getOpcode() == X86::XCHGrr16) { const MachineOperand &op0 = MI.getOperand(0), &op1 = MI.getOperand(1); - if (op0.isMachineRegister() && op0.getMachineRegNum() == X86::AX && - op1.isMachineRegister() && op1.getMachineRegNum() == X86::AX) { + if (op0.isPhysicalRegister() && op0.getReg() == X86::AX && + op1.isPhysicalRegister() && op1.getReg() == X86::AX) { return true; } } |