diff options
| author | Bob Wilson <bob.wilson@apple.com> | 2009-10-13 20:50:28 +0000 | 
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2009-10-13 20:50:28 +0000 | 
| commit | 765cc0b9d59bf63dfcb02e3d126ea1c63e16f86f (patch) | |
| tree | b286d2e76338a4b6ad5048d1e89ec01b9eea173e | |
| parent | 4360298d2bf3c1ba8595a415cfa235df0bc76335 (diff) | |
Revise ARM inline assembly memory operands to require the memory address to
be in a register.  The previous use of ARM address mode 2 was completely
arbitrary and inappropriate for Thumb.  Radar 7137468.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84022 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 12 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 5 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll | 4 | 
3 files changed, 11 insertions, 10 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index b0b100c8ef..1651851761 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -2156,14 +2156,10 @@ bool ARMDAGToDAGISel::  SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,                               std::vector<SDValue> &OutOps) {    assert(ConstraintCode == 'm' && "unexpected asm memory constraint"); - -  SDValue Base, Offset, Opc; -  if (!SelectAddrMode2(Op, Op, Base, Offset, Opc)) -    return true; - -  OutOps.push_back(Base); -  OutOps.push_back(Offset); -  OutOps.push_back(Opc); +  // Require the address to be in a register.  That is safe for all ARM +  // variants and it is hard to do anything much smarter without knowing +  // how the operand is used. +  OutOps.push_back(Op);    return false;  } diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index 1679e12be0..546731b00d 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -1017,7 +1017,10 @@ bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,                                            const char *ExtraCode) {    if (ExtraCode && ExtraCode[0])      return true; // Unknown modifier. -  printAddrMode2Operand(MI, OpNum); + +  const MachineOperand &MO = MI->getOperand(OpNum); +  assert(MO.isReg() && "unexpected inline asm memory operand"); +  O << "[" << getRegisterName(MO.getReg()) << "]";    return false;  } diff --git a/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll b/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll index 2fc9eb3741..1e2707f7b5 100644 --- a/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll +++ b/test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll @@ -1,7 +1,9 @@ -; RUN: llc < %s -march=arm | grep swp +; RUN: llc < %s -march=arm | FileCheck %s +; RUN: llc < %s -march=thumb | FileCheck %s  ; PR4091  define void @foo(i32 %i, i32* %p) nounwind { +;CHECK: swp r2, r0, [r1]  	%asmtmp = call i32 asm sideeffect "swp $0, $2, $3", "=&r,=*m,r,*m,~{memory}"(i32* %p, i32 %i, i32* %p) nounwind  	ret void  }  | 
