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authorEvan Cheng <evan.cheng@apple.com>2007-05-15 01:26:09 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-05-15 01:26:09 +0000
commit19e3f31f6acd9f5ce3cdd8372d4cb598ed921f95 (patch)
tree6f2ea5b043b94a0bef65bc519b8e7bbb179a0fd7
parent30d15757e3a203eb4b7170dfccbfd1f93476567b (diff)
Added getNumExplicitOperands and findFirstPredOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37064 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/CodeGen/MachineInstr.h10
-rw-r--r--lib/CodeGen/MachineInstr.cpp46
2 files changed, 56 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index a6e14e21fd..c722f13449 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -378,6 +378,9 @@ public:
return Operands[i];
}
+ /// getNumExplicitOperands - Returns the number of non-implicit operands.
+ ///
+ unsigned getNumExplicitOperands() const;
/// isIdenticalTo - Return true if this instruction is identical to (same
/// opcode and same operands as) the specified instruction.
@@ -413,11 +416,18 @@ public:
/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
/// the specific register or NULL if it is not found.
MachineOperand *findRegisterDefOperand(unsigned Reg);
+
+ /// findFirstPredOperand() - Find the first operand in the operand list that
+ // is used to represent the predicate.
+ MachineOperand *findFirstPredOperand();
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
void copyKillDeadInfo(const MachineInstr *MI);
+ /// copyPredicates - Copies predicate operand(s) from MI.
+ void copyPredicates(const MachineInstr *MI);
+
//
// Debugging support
//
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 9d09a9f95e..5de74efe96 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -141,6 +141,21 @@ bool MachineInstr::OperandsComplete() const {
return false;
}
+/// getNumExplicitOperands - Returns the number of non-implicit operands.
+///
+unsigned MachineInstr::getNumExplicitOperands() const {
+ unsigned NumOperands = TID->numOperands;
+ if ((TID->Flags & M_VARIABLE_OPS) == 0)
+ return NumOperands;
+
+ for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
+ const MachineOperand &MO = getOperand(NumOperands);
+ if (!MO.isRegister() || !MO.isImplicit())
+ NumOperands++;
+ }
+ return NumOperands;
+}
+
/// isIdenticalTo - Return true if this operand is identical to the specified
/// operand.
bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
@@ -192,6 +207,19 @@ MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
}
return NULL;
}
+
+/// findFirstPredOperand() - Find the first operand in the operand list that
+// is used to represent the predicate.
+MachineOperand *MachineInstr::findFirstPredOperand() {
+ const TargetInstrDescriptor *TID = getInstrDescriptor();
+ if (TID->Flags & M_PREDICATED) {
+ for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
+ if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
+ return &getOperand(i);
+ }
+
+ return NULL;
+}
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
@@ -213,6 +241,24 @@ void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
}
}
+/// copyPredicates - Copies predicate operand(s) from MI.
+void MachineInstr::copyPredicates(const MachineInstr *MI) {
+ const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+ if (TID->Flags & M_PREDICATED) {
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+ if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
+ const MachineOperand &MO = MI->getOperand(i);
+ // Predicated operands must be last operands.
+ if (MO.isReg())
+ addRegOperand(MO.getReg(), false);
+ else {
+ addImmOperand(MO.getImm());
+ }
+ }
+ }
+ }
+}
+
void MachineInstr::dump() const {
cerr << " " << *this;
}