diff options
author | Evan Cheng <evan.cheng@apple.com> | 2005-12-24 09:48:35 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2005-12-24 09:48:35 +0000 |
commit | e4672aa5b42755d470f403b484958903227013ff (patch) | |
tree | b4452085d6a988163f91521f5915020c0110eb45 | |
parent | c687b4874126bb8a302dbf64786d6295e7ed8457 (diff) |
Let the helper functions know about X86::FR32RegClass and X86::FR64RegClass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25004 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 73026bbfda..d220cff851 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -57,9 +57,9 @@ void X86RegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB, Opc = X86::MOV16mr; } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) { Opc = X86::FpST64m; - } else if (RC == &X86::V4F4RegClass) { + } else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) { Opc = X86::MOVSSmr; - } else if (RC == &X86::V2F8RegClass) { + } else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) { Opc = X86::MOVSDmr; } else { assert(0 && "Unknown regclass"); @@ -81,9 +81,9 @@ void X86RegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, Opc = X86::MOV16rm; } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) { Opc = X86::FpLD64m; - } else if (RC == &X86::V4F4RegClass) { + } else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) { Opc = X86::MOVSSrm; - } else if (RC == &X86::V2F8RegClass) { + } else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) { Opc = X86::MOVSDrm; } else { assert(0 && "Unknown regclass"); @@ -105,9 +105,9 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB, Opc = X86::MOV16rr; } else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) { Opc = X86::FpMOV; - } else if (RC == &X86::V4F4RegClass) { + } else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) { Opc = X86::MOVSSrr; - } else if (RC == &X86::V2F8RegClass) { + } else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) { Opc = X86::MOVSDrr; } else { assert(0 && "Unknown regclass"); |