CellSPU:

- Change default scheduling preference to list-burr, which produces somewhat
  better code than the default. Could also use list-tdrr, but need to ask
  dev list about the appropriate handy mnemonic before commiting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60738 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 5 insertions, 2 deletions

diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp
index 2b35e76595..031d068c54 100644
--- a/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -28,6 +28,7 @@
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Target/TargetOptions.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
 
 #include <map>
 
@@ -415,8 +416,10 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
 
   computeRegisterProperties();
 
-  // Set other properties:
-  setSchedulingPreference(SchedulingForLatency);
+  // Set pre-RA register scheduler default to BURR, which produces slightly
+  // better code than the default (could also be TDRR, but TargetLowering.h
+  // needs a mod to support that model):
+  setSchedulingPreference(SchedulingForRegPressure);
 }
 
 const char *