aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2006-04-27 21:14:21 +0000
committerChris Lattner <sabre@nondot.org>2006-04-27 21:14:21 +0000
commitd929f06f4d041350e25f6f058ca52b7d0ed68f6f (patch)
tree26f5980ab7f445e509833bb3ab39740f281f1bcc
parent011ec7f29cb0162b77012e12a0391077a5f74d2d (diff)
Add support for inserting undef into a vector. This implements
Transforms/InstCombine/vec_insert_to_shuffle.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27997 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/InstructionCombining.cpp17
1 files changed, 14 insertions, 3 deletions
diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 1c4bceaef4..590e0d9d97 100644
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -6959,12 +6959,23 @@ static bool CollectSingleShuffleElements(Value *V, Value *LHS, Value *RHS,
Value *ScalarOp = IEI->getOperand(1);
Value *IdxOp = IEI->getOperand(2);
- if (ExtractElementInst *EI = dyn_cast<ExtractElementInst>(ScalarOp)) {
- if (isa<ConstantInt>(EI->getOperand(1)) && isa<ConstantInt>(IdxOp) &&
+ if (!isa<ConstantInt>(IdxOp))
+ return false;
+ unsigned InsertedIdx = cast<ConstantInt>(IdxOp)->getRawValue();
+
+ if (isa<UndefValue>(ScalarOp)) { // inserting undef into vector.
+ // Okay, we can handle this if the vector we are insertinting into is
+ // transitively ok.
+ if (CollectSingleShuffleElements(VecOp, LHS, RHS, Mask)) {
+ // If so, update the mask to reflect the inserted undef.
+ Mask[InsertedIdx] = UndefValue::get(Type::UIntTy);
+ return true;
+ }
+ } else if (ExtractElementInst *EI = dyn_cast<ExtractElementInst>(ScalarOp)){
+ if (isa<ConstantInt>(EI->getOperand(1)) &&
EI->getOperand(0)->getType() == V->getType()) {
unsigned ExtractedIdx =
cast<ConstantInt>(EI->getOperand(1))->getRawValue();
- unsigned InsertedIdx = cast<ConstantInt>(IdxOp)->getRawValue();
// This must be extracting from either LHS or RHS.
if (EI->getOperand(0) == LHS || EI->getOperand(0) == RHS) {