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authorDan Gohman <gohman@apple.com>2008-01-31 01:01:48 +0000
committerDan Gohman <gohman@apple.com>2008-01-31 01:01:48 +0000
commitbbfb9c57c71ed4a2a4a60010b98dbfe96c984b14 (patch)
tree8f6235ec7d0fb8d092e690f2556cb0a7bc37fedb
parent35e9f7d711ad77aec8336073ca843d94f386d498 (diff)
Avoid unnecessarily casting away const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46590 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 9d72694f9a..873a587ded 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4977,7 +4977,7 @@ SDOperand X86TargetLowering::LowerTRAMPOLINE(SDOperand Op,
{ Trmp, DAG.getNode(ISD::TokenFactor, MVT::Other, OutChains, 6) };
return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), Ops, 2);
} else {
- Function *Func = (Function *)
+ const Function *Func =
cast<Function>(cast<SrcValueSDNode>(Op.getOperand(5))->getValue());
unsigned CC = Func->getCallingConv();
unsigned NestReg;