diff options
| author | Dan Gohman <gohman@apple.com> | 2009-03-04 19:23:38 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-03-04 19:23:38 +0000 |
| commit | b37a8206b6ba10c2bd59e19811dfd88091021556 (patch) | |
| tree | e2659d5ff5d55a6cf88649b0589f15a5772012e2 | |
| parent | 88fe1ad187041e2ca636e0f86204e30fc6e14300 (diff) | |
When using MachineInstr operand indices on SDNodes, the number
of MachineInstr def operands must be subtracted out. This bug
was uncovered by the recent x86 EFLAGS optimization. Before
that, the only instructions that ever needed unfolding were
things like CMP32rm, where NumDefs is zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66056 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 1d1db14efe..3de7dfce88 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -2382,6 +2382,7 @@ X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, const TargetOperandInfo &TOI = TID.OpInfo[Index]; const TargetRegisterClass *RC = TOI.isLookupPtrRegClass() ? RI.getPointerRegClass() : RI.getRegClass(TOI.RegClass); + unsigned NumDefs = TID.NumDefs; std::vector<SDValue> AddrOps; std::vector<SDValue> BeforeOps; std::vector<SDValue> AfterOps; @@ -2389,11 +2390,11 @@ X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, unsigned NumOps = N->getNumOperands(); for (unsigned i = 0; i != NumOps-1; ++i) { SDValue Op = N->getOperand(i); - if (i >= Index && i < Index+4) + if (i >= Index-NumDefs && i < Index-NumDefs+4) AddrOps.push_back(Op); - else if (i < Index) + else if (i < Index-NumDefs) BeforeOps.push_back(Op); - else if (i > Index) + else if (i > Index-NumDefs) AfterOps.push_back(Op); } SDValue Chain = N->getOperand(NumOps-1); |