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authorEvan Cheng <evan.cheng@apple.com>2006-01-18 09:26:46 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-01-18 09:26:46 +0000
commit99fa0a102ae59e2fa489982157dd508cd32caad7 (patch)
tree048c8855091cae629ca11423db61909dd129a8c4
parent68e5d084f1a51e71b38aceb8ccc12734adcce9ef (diff)
SRA shift amount must be in i8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25416 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 6a656142f7..7ed6c94de2 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1448,7 +1448,7 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
SDOperand ShOpHi = Op.getOperand(1);
SDOperand ShAmt = Op.getOperand(2);
SDOperand Tmp1 = isSRA ? DAG.getNode(ISD::SRA, MVT::i32, ShOpHi,
- DAG.getConstant(31, MVT::i32))
+ DAG.getConstant(31, MVT::i8))
: DAG.getConstant(0, MVT::i32);
SDOperand Tmp2, Tmp3;