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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:22:46 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:22:46 +0000 |
| commit | 85c5c3f138257eb8db8f7afc9c0543ee48d88201 (patch) | |
| tree | 5873d33d2ece548e6d15ae8e175385fa8377ac21 | |
| parent | 299dc78d67c63d9ea365a3b39a418998c26096ab (diff) | |
Proper FP extloads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76028 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/SystemZ/SystemZISelLowering.cpp | 12 | ||||
| -rw-r--r-- | lib/Target/SystemZ/SystemZInstrFP.td | 4 |
2 files changed, 9 insertions, 7 deletions
diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index 83afcf404a..01ecf4fae9 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -65,13 +65,13 @@ SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) : setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote); - setLoadExtAction(ISD::SEXTLOAD, MVT::f32, Promote); - setLoadExtAction(ISD::ZEXTLOAD, MVT::f32, Promote); - setLoadExtAction(ISD::EXTLOAD, MVT::f32, Promote); + setLoadExtAction(ISD::SEXTLOAD, MVT::f32, Expand); + setLoadExtAction(ISD::ZEXTLOAD, MVT::f32, Expand); + setLoadExtAction(ISD::EXTLOAD, MVT::f32, Expand); - setLoadExtAction(ISD::SEXTLOAD, MVT::f64, Promote); - setLoadExtAction(ISD::ZEXTLOAD, MVT::f64, Promote); - setLoadExtAction(ISD::EXTLOAD, MVT::f64, Promote); + setLoadExtAction(ISD::SEXTLOAD, MVT::f64, Expand); + setLoadExtAction(ISD::ZEXTLOAD, MVT::f64, Expand); + setLoadExtAction(ISD::EXTLOAD, MVT::f64, Expand); setStackPointerRegisterToSaveRestore(SystemZ::R15D); setSchedulingPreference(SchedulingForLatency); diff --git a/lib/Target/SystemZ/SystemZInstrFP.td b/lib/Target/SystemZ/SystemZInstrFP.td index 1c1b0ebb35..b54cd26c6d 100644 --- a/lib/Target/SystemZ/SystemZInstrFP.td +++ b/lib/Target/SystemZ/SystemZInstrFP.td @@ -167,10 +167,12 @@ def FROUND64r32 : Pseudo<(outs FP32:$dst), (ins FP64:$src), "ledbr\t{$dst, $src}", [(set FP32:$dst, (fround FP64:$src))]>; -// FIXME: memory variant def FEXT32r64 : Pseudo<(outs FP64:$dst), (ins FP32:$src), "ldebr\t{$dst, $src}", [(set FP64:$dst, (fextend FP32:$src))]>; +def FEXT32m64 : Pseudo<(outs FP64:$dst), (ins rriaddr:$src), + "ldeb\t{$dst, $src}", + [(set FP64:$dst, (fextend (load rriaddr:$src)))]>; let Defs = [PSW] in { def FCONVFP32 : Pseudo<(outs FP32:$dst), (ins GR32:$src), |