diff options
| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-08 05:15:08 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-11-08 05:15:08 +0000 |
| commit | 7a2f1e7c5d29682a772af75e78621e6c431e3e4c (patch) | |
| tree | 22d563a2e34d712f3bc5ca62db45fe400958f2f8 | |
| parent | 3e95814685a61fb309ed055a749164f26dcff2d7 (diff) | |
Add handle to TargetMachine object in all Machine...Info classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1197 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/TargetMachine.cpp | 6 | ||||
| -rw-r--r-- | lib/Target/TargetSchedInfo.cpp | 7 |
2 files changed, 8 insertions, 5 deletions
diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index d508b32a39..83bd2f3a3d 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -49,10 +49,12 @@ TargetMachine::findOptimalStorageSize(const Type* ty) const /*ctor*/ -MachineInstrInfo::MachineInstrInfo(const MachineInstrDescriptor* _desc, +MachineInstrInfo::MachineInstrInfo(const TargetMachine& tgt, + const MachineInstrDescriptor* _desc, unsigned int _descSize, unsigned int _numRealOpCodes) - : desc(_desc), descSize(_descSize), numRealOpCodes(_numRealOpCodes) + : target(tgt), + desc(_desc), descSize(_descSize), numRealOpCodes(_numRealOpCodes) { // FIXME: TargetInstrDescriptors should not be global assert(TargetInstrDescriptors == NULL && desc != NULL); diff --git a/lib/Target/TargetSchedInfo.cpp b/lib/Target/TargetSchedInfo.cpp index 14ac057654..f9dca290b0 100644 --- a/lib/Target/TargetSchedInfo.cpp +++ b/lib/Target/TargetSchedInfo.cpp @@ -78,14 +78,15 @@ ComputeMinGap(const InstrRUsage &fromRU, // Interface to machine description for instruction scheduling //--------------------------------------------------------------------------- -MachineSchedInfo::MachineSchedInfo(int NumSchedClasses, - const MachineInstrInfo* Mii, +MachineSchedInfo::MachineSchedInfo(const TargetMachine& tgt, + int NumSchedClasses, const InstrClassRUsage* ClassRUsages, const InstrRUsageDelta* UsageDeltas, const InstrIssueDelta* IssueDeltas, unsigned int NumUsageDeltas, unsigned int NumIssueDeltas) - : numSchedClasses(NumSchedClasses), mii(Mii), + : target(tgt), + numSchedClasses(NumSchedClasses), mii(& tgt.getInstrInfo()), classRUsages(ClassRUsages), usageDeltas(UsageDeltas), issueDeltas(IssueDeltas), numUsageDeltas(NumUsageDeltas), numIssueDeltas(NumIssueDeltas) |