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authorChris Lattner <sabre@nondot.org>2006-02-07 00:47:13 +0000
committerChris Lattner <sabre@nondot.org>2006-02-07 00:47:13 +0000
commit763317de1bda41581b12915b31ba06c2e16450fe (patch)
tree1891e0b5842427e52aecd32ffbd689e1ceb52244
parent21ad392ee69191f414fd027ed52360282b0bacbf (diff)
Add the simple PPC integer constraints
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26027 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp41
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.h2
2 files changed, 42 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index ec35f37e96..76bcf1e5c3 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1035,3 +1035,44 @@ getRegForInlineAsmConstraint(const std::string &Constraint) const {
// Handle explicit register names.
return TargetLowering::getRegForInlineAsmConstraint(Constraint);
}
+
+// isOperandValidForConstraint
+bool PPCTargetLowering::
+isOperandValidForConstraint(SDOperand Op, char Letter) {
+ switch (Letter) {
+ default: break;
+ case 'I':
+ case 'J':
+ case 'K':
+ case 'L':
+ case 'M':
+ case 'N':
+ case 'O':
+ case 'P': {
+ if (!isa<ConstantSDNode>(Op)) return false; // Must be an immediate.
+ unsigned Value = cast<ConstantSDNode>(Op)->getValue();
+ switch (Letter) {
+ default: assert(0 && "Unknown constraint letter!");
+ case 'I': // "I" is a signed 16-bit constant.
+ return (short)Value == (int)Value;
+ case 'J': // "J" is a constant with only the high-order 16 bits nonzero.
+ case 'L': // "L" is a signed 16-bit constant shifted left 16 bits.
+ return (short)Value == 0;
+ case 'K': // "K" is a constant with only the low-order 16 bits nonzero.
+ return (Value >> 16) == 0;
+ case 'M': // "M" is a constant that is greater than 31.
+ return Value > 31;
+ case 'N': // "N" is a positive constant that is an exact power of two.
+ return (int)Value > 0 && isPowerOf2_32(Value);
+ case 'O': // "O" is the constant zero.
+ return Value == 0;
+ case 'P': // "P" is a constant whose negation is a signed 16-bit constant.
+ return (short)-Value == (int)-Value;
+ }
+ break;
+ }
+ }
+
+ // Handle standard constraint letters.
+ return TargetLowering::isOperandValidForConstraint(Op, Letter);
+}
diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h
index 30db16c8f9..bcf4c6ffe4 100644
--- a/lib/Target/PowerPC/PPCISelLowering.h
+++ b/lib/Target/PowerPC/PPCISelLowering.h
@@ -99,7 +99,7 @@ namespace llvm {
std::vector<unsigned>
getRegForInlineAsmConstraint(const std::string &Constraint) const;
-
+ bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
};
}