diff options
| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-14 18:26:31 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-07-14 18:26:31 +0000 |
| commit | 5f8cce13486dd9c5e7374c5e467750298791bac8 (patch) | |
| tree | f70605c4087e7380fbef4a5920ce7f9d9c9c5f9e | |
| parent | 33af23d902e8403ad6d470b2a0b6e814a596e037 (diff) | |
Make sure MTSPR instruction is inserted into the BasicBlock
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14822 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/PowerPC/PPC32ISelSimple.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PowerPCISelSimple.cpp | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index c986ca4afd..10a19b5524 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -1437,7 +1437,7 @@ void ISel::visitCallInst(CallInst &CI) { TheCall = BuildMI(PPC32::CALLpcrel, 1).addGlobalAddress(F, true); } else { // Emit an indirect call through the CTR unsigned Reg = getReg(CI.getCalledValue()); - BuildMI(PPC32::MTSPR, 2).addZImm(9).addReg(Reg); + BuildMI(BB, PPC32::MTSPR, 2).addZImm(9).addReg(Reg); TheCall = BuildMI(PPC32::CALLindirect, 1).addZImm(20).addZImm(0); } diff --git a/lib/Target/PowerPC/PowerPCISelSimple.cpp b/lib/Target/PowerPC/PowerPCISelSimple.cpp index c986ca4afd..10a19b5524 100644 --- a/lib/Target/PowerPC/PowerPCISelSimple.cpp +++ b/lib/Target/PowerPC/PowerPCISelSimple.cpp @@ -1437,7 +1437,7 @@ void ISel::visitCallInst(CallInst &CI) { TheCall = BuildMI(PPC32::CALLpcrel, 1).addGlobalAddress(F, true); } else { // Emit an indirect call through the CTR unsigned Reg = getReg(CI.getCalledValue()); - BuildMI(PPC32::MTSPR, 2).addZImm(9).addReg(Reg); + BuildMI(BB, PPC32::MTSPR, 2).addZImm(9).addReg(Reg); TheCall = BuildMI(PPC32::CALLindirect, 1).addZImm(20).addZImm(0); } |