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| author | Evan Cheng <evan.cheng@apple.com> | 2006-11-29 08:28:13 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-11-29 08:28:13 +0000 |
| commit | 3fa9dff2c97778f3c3c3c7a0e69f3543a03041d3 (patch) | |
| tree | 04087099391d89856d9e7e513d8909d7caf3fde2 | |
| parent | f0b3ba6752a49a8868d423ddc2704a52b7101571 (diff) | |
Custom lower READCYCLECOUNTER for x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32017 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 26 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 8 |
2 files changed, 22 insertions, 12 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 1e5b1759a5..23ed5df0a0 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4728,12 +4728,26 @@ X86TargetLowering::LowerREADCYCLCECOUNTER(SDOperand Op, SelectionDAG &DAG) { Ops.push_back(Op.getOperand(0)); SDOperand rd = DAG.getNode(X86ISD::RDTSC_DAG, Tys, &Ops[0], Ops.size()); Ops.clear(); - Ops.push_back(DAG.getCopyFromReg(rd, X86::EAX, MVT::i32, rd.getValue(1))); - Ops.push_back(DAG.getCopyFromReg(Ops[0].getValue(1), X86::EDX, - MVT::i32, Ops[0].getValue(2))); - Ops.push_back(Ops[1].getValue(1)); - Tys[0] = Tys[1] = MVT::i32; - Tys.push_back(MVT::Other); + if (Subtarget->is64Bit()) { + SDOperand Copy1 = DAG.getCopyFromReg(rd, X86::RAX, MVT::i64, rd.getValue(1)); + SDOperand Copy2 = DAG.getCopyFromReg(Copy1.getValue(1), X86::RDX, + MVT::i64, Copy1.getValue(2)); + SDOperand Tmp = DAG.getNode(ISD::SHL, MVT::i64, Copy2, + DAG.getConstant(32, MVT::i8)); + Ops.push_back(DAG.getNode(ISD::OR, MVT::i64, Copy1, Tmp)); + Ops.push_back(Copy2.getValue(1)); + Tys[0] = MVT::i64; + Tys[1] = MVT::Other; + } else { + SDOperand Copy1 = DAG.getCopyFromReg(rd, X86::EAX, MVT::i32, rd.getValue(1)); + SDOperand Copy2 = DAG.getCopyFromReg(Copy1.getValue(1), X86::EDX, + MVT::i32, Copy1.getValue(2)); + Ops.push_back(Copy1); + Ops.push_back(Copy2); + Ops.push_back(Copy2.getValue(1)); + Tys[0] = Tys[1] = MVT::i32; + Tys.push_back(MVT::Other); + } return DAG.getNode(ISD::MERGE_VALUES, Tys, &Ops[0], Ops.size()); } diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index b93d2f7c14..f50553c077 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -536,6 +536,8 @@ def REP_STOSD : I<0xAB, RawFrm, (ops), "{rep;stosl|rep stosd}", [(X86rep_stos i32)]>, Imp<[EAX,ECX,EDI], [ECX,EDI]>, REP; +def RDTSC : I<0x31, RawFrm, (ops), "rdtsc", [(X86rdtsc)]>, + TB, Imp<[],[RAX,RDX]>; //===----------------------------------------------------------------------===// // Input/Output Instructions... @@ -2397,12 +2399,6 @@ def CWD : I<0x99, RawFrm, (ops), def CDQ : I<0x99, RawFrm, (ops), "{cltd|cdq}", []>, Imp<[EAX],[EAX,EDX]>; // EDX:EAX = signext(EAX) -//===----------------------------------------------------------------------===// -// Miscellaneous Instructions -//===----------------------------------------------------------------------===// - -def RDTSC : I<0x31, RawFrm, (ops), "rdtsc", [(X86rdtsc)]>, - TB, Imp<[],[EAX,EDX]>; //===----------------------------------------------------------------------===// // Alias Instructions |