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authorDan Gohman <gohman@apple.com>2008-06-30 20:33:57 +0000
committerDan Gohman <gohman@apple.com>2008-06-30 20:33:57 +0000
commit3d3c3e0cfade01e3cccdb9f1f2bddf5c8c17aa48 (patch)
tree8fe7d74d2da926fa756abb9b71e3f5d3a7dd4629
parenta44b674a42b6ca57128c4eb5a358298ed3bb1406 (diff)
Change bools to 1-bit bitfields to shrink ArgListEntry slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52918 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/Target/TargetLowering.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 8822a1736a..afa8174e5f 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -975,12 +975,12 @@ public:
struct ArgListEntry {
SDOperand Node;
const Type* Ty;
- bool isSExt;
- bool isZExt;
- bool isInReg;
- bool isSRet;
- bool isNest;
- bool isByVal;
+ bool isSExt : 1;
+ bool isZExt : 1;
+ bool isInReg : 1;
+ bool isSRet : 1;
+ bool isNest : 1;
+ bool isByVal : 1;
uint16_t Alignment;
ArgListEntry() : isSExt(false), isZExt(false), isInReg(false),