diff options
author | Tanya Lattner <tonic@nondot.org> | 2009-09-12 22:30:53 +0000 |
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committer | Tanya Lattner <tonic@nondot.org> | 2009-09-12 22:30:53 +0000 |
commit | 031fdbb7e8a406dbfc5cf57f6aa5e1b75d31d285 (patch) | |
tree | 05b619641df33d945fc1d3cc304ccc53d73be137 | |
parent | 8a57704ed4623b595d741cc9a4aca0b4b7c4a112 (diff) |
Merge 81403 from mainline.
Fix double load / store multiple encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_26@81641 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMCodeEmitter.cpp | 2 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 5 |
2 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 6218fceac1..4713b926e9 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -963,7 +963,7 @@ static unsigned getAddrModeUPBits(unsigned Mode) { // DB - Decrement before - bit U = 0 and bit P = 1 switch (Mode) { default: llvm_unreachable("Unknown addressing sub-mode!"); - case ARM_AM::da: break; + case ARM_AM::da: break; case ARM_AM::db: Binary |= 0x1 << ARMII::P_BitShift; break; case ARM_AM::ia: Binary |= 0x1 << ARMII::U_BitShift; break; case ARM_AM::ib: Binary |= 0x3 << ARMII::U_BitShift; break; diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index deff83b1c9..355ba743bb 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -1070,7 +1070,7 @@ class ASI5<bits<4> opcod1, bits<2> opcod2, dag oops, dag iops, } // Load / store multiple -class AXSI5<dag oops, dag iops, InstrItinClass itin, +class AXDI5<dag oops, dag iops, InstrItinClass itin, string asm, list<dag> pattern> : VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone, VFPLdStMulFrm, itin, asm, "", pattern> { @@ -1079,7 +1079,7 @@ class AXSI5<dag oops, dag iops, InstrItinClass itin, let Inst{11-8} = 0b1011; } -class AXDI5<dag oops, dag iops, InstrItinClass itin, +class AXSI5<dag oops, dag iops, InstrItinClass itin, string asm, list<dag> pattern> : VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone, VFPLdStMulFrm, itin, asm, "", pattern> { @@ -1088,7 +1088,6 @@ class AXDI5<dag oops, dag iops, InstrItinClass itin, let Inst{11-8} = 0b1010; } - // Double precision, unary class ADuI<bits<8> opcod1, bits<4> opcod2, bits<4> opcod3, dag oops, dag iops, InstrItinClass itin, string opc, string asm, list<dag> pattern> |