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authorEvan Cheng <evan.cheng@apple.com>2008-10-06 21:13:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-10-06 21:13:08 +0000
commit882cdfde516fb97a1fda1a3bbc85b1792aa7659c (patch)
treea12486c2bf1e82f14265930dc027a02fbdcbbe29
parent65609f2efa17916f77083a10a9a5239ff2fa1899 (diff)
Fix PR2850 and PR2863. Only generate movddup for 128-bit SSE vector shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57210 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp1
-rw-r--r--test/CodeGen/X86/2008-10-06-MMXISelBug.ll12
2 files changed, 13 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 494ac1d279..d74588e628 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -3954,6 +3954,7 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) {
// Canonicalize movddup shuffles.
if (V2IsUndef && Subtarget->hasSSE2() &&
+ VT.getSizeInBits() == 128 &&
X86::isMOVDDUPMask(PermMask.getNode()))
return CanonicalizeMovddup(Op, V1, PermMask, DAG, Subtarget->hasSSE3());
diff --git a/test/CodeGen/X86/2008-10-06-MMXISelBug.ll b/test/CodeGen/X86/2008-10-06-MMXISelBug.ll
new file mode 100644
index 0000000000..bd1ad59797
--- /dev/null
+++ b/test/CodeGen/X86/2008-10-06-MMXISelBug.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx,+sse2
+; PR2850
+
+@tmp_V2i = common global <2 x i32> zeroinitializer ; <<2 x i32>*> [#uses=2]
+
+define void @f0() nounwind {
+entry:
+ %0 = load <2 x i32>* @tmp_V2i, align 8 ; <<2 x i32>> [#uses=1]
+ %1 = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer ; <<2 x i32>> [#uses=1]
+ store <2 x i32> %1, <2 x i32>* @tmp_V2i, align 8
+ ret void
+}