aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChris Lattner <sabre@nondot.org>2007-05-17 03:29:42 +0000
committerChris Lattner <sabre@nondot.org>2007-05-17 03:29:42 +0000
commitda66472ea65d1624ce8e401598dfffa77aafc6df (patch)
tree9a6f9df411c4288885f05d31b9ce727e2e611386
parent944a3f4d01bad3a1d89915f3f21be2a681d4c5cd (diff)
Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37141 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp11
1 files changed, 10 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 6de6b21c78..7a12dc6ca5 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -1614,6 +1614,13 @@ bool X86::isPSHUFLWMask(SDNode *N) {
static bool isSHUFPMask(const SDOperand *Elems, unsigned NumElems) {
if (NumElems != 2 && NumElems != 4) return false;
+ // Ensure this is not an mmx shuffle.
+ if (NumElems == 4 && Elems[0].getValueType() == MVT::i16)
+ return false;
+ if (NumElems == 2 && Elems[0].getValueType() == MVT::i32)
+ return false;
+
+
unsigned Half = NumElems / 2;
for (unsigned i = 0; i < Half; ++i)
if (!isUndefOrInRange(Elems[i], 0, NumElems))
@@ -2712,7 +2719,9 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) {
}
}
- if (NumElems == 4) {
+ if (NumElems == 4 &&
+ // Don't do this for MMX.
+ MVT::getSizeInBits(VT) != 64) {
MVT::ValueType MaskVT = PermMask.getValueType();
MVT::ValueType MaskEVT = MVT::getVectorBaseType(MaskVT);
SmallVector<std::pair<int, int>, 8> Locs;