diff options
author | Evan Cheng <evan.cheng@apple.com> | 2007-05-16 20:50:23 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2007-05-16 20:50:23 +0000 |
commit | b5f8eff566ab35a15dcd5bf490047c7ccfcecce0 (patch) | |
tree | be9fad77b482f05708b92cd12f62fb1118cd7e87 | |
parent | 5ada199246ec384cf4a21b4b5413703820611e3e (diff) |
Removed isPredicable().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37119 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 9 | ||||
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.h | 1 |
2 files changed, 0 insertions, 10 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index de9ea48b26..b631124b6e 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -423,15 +423,6 @@ ReverseBranchCondition(std::vector<MachineOperand> &Cond) const { return false; } -bool ARMInstrInfo::isPredicatable(MachineInstr *MI) const { - const TargetInstrDescriptor *TID = MI->getInstrDescriptor(); - if (TID->Flags & M_PREDICATED) - return true; - - unsigned Opc = MI->getOpcode(); - return Opc == ARM::B || Opc == ARM::tB; -} - void ARMInstrInfo::PredicateInstruction(MachineInstr *MI, std::vector<MachineOperand> &Cond) const { unsigned Opc = MI->getOpcode(); diff --git a/lib/Target/ARM/ARMInstrInfo.h b/lib/Target/ARM/ARMInstrInfo.h index d51b9bd74b..cb0b812e16 100644 --- a/lib/Target/ARM/ARMInstrInfo.h +++ b/lib/Target/ARM/ARMInstrInfo.h @@ -104,7 +104,6 @@ public: virtual bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const; // Predication support. - virtual bool isPredicatable(MachineInstr *MI) const; virtual void PredicateInstruction(MachineInstr *MI, std::vector<MachineOperand> &Cond) const; }; |