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<title>llvm/test/Transforms, branch release_29</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/test/Transforms?h=release_29</id>
<link rel='self' href='https://git.amat.us/llvm/atom/test/Transforms?h=release_29'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2011-03-30T21:44:24Z</updated>
<entry>
<title>Merging r128577</title>
<updated>2011-03-30T21:44:24Z</updated>
<author>
<name>Bill Wendling</name>
<email>isanbard@gmail.com</email>
</author>
<published>2011-03-30T21:44:24Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=dbfa8045afc4dc9166736f0531092580e9e1dfb9'/>
<id>urn:sha1:dbfa8045afc4dc9166736f0531092580e9e1dfb9</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@128579 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>--- Merging r127464 into '.':                                                 </title>
<updated>2011-03-14T20:06:27Z</updated>
<author>
<name>Bill Wendling</name>
<email>isanbard@gmail.com</email>
</author>
<published>2011-03-14T20:06:27Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=fc3b6f3a4d54e4243f909cc0caafdc13b94fed93'/>
<id>urn:sha1:fc3b6f3a4d54e4243f909cc0caafdc13b94fed93</id>
<content type='text'>
U    test/Transforms/InstCombine/select.ll
U    lib/Transforms/InstCombine/InstCombineSelect.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@127609 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Preserve line no. info.</title>
<updated>2011-03-07T22:43:45Z</updated>
<author>
<name>Devang Patel</name>
<email>dpatel@apple.com</email>
</author>
<published>2011-03-07T22:43:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=cd77a50e638be5e7153ebe2a8ba875de7df48bea'/>
<id>urn:sha1:cd77a50e638be5e7153ebe2a8ba875de7df48bea</id>
<content type='text'>
Radar 9097659


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127182 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Add test for r127138.</title>
<updated>2011-03-07T21:28:14Z</updated>
<author>
<name>Rafael Espindola</name>
<email>rafael.espindola@gmail.com</email>
</author>
<published>2011-03-07T21:28:14Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=e390b3245f00627eb5c5bde5eb4ff6b6ff7c752d'/>
<id>urn:sha1:e390b3245f00627eb5c5bde5eb4ff6b6ff7c752d</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127172 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Tweak this test. We can analyze what happens and show that we still do the</title>
<updated>2011-03-07T02:10:18Z</updated>
<author>
<name>Nick Lewycky</name>
<email>nicholas@mxc.ca</email>
</author>
<published>2011-03-07T02:10:18Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=bf433e5f46f6de9298bc072da6f02067198eff2a'/>
<id>urn:sha1:bf433e5f46f6de9298bc072da6f02067198eff2a</id>
<content type='text'>
right thing, instead of merely being unable to analyze and the transform
doesn't occur.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127149 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Add more analysis of the sign bit of an srem instruction. If the LHS is negative</title>
<updated>2011-03-07T01:50:10Z</updated>
<author>
<name>Nick Lewycky</name>
<email>nicholas@mxc.ca</email>
</author>
<published>2011-03-07T01:50:10Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=c14bc77315ac4867f16c1585181b41919339eb3c'/>
<id>urn:sha1:c14bc77315ac4867f16c1585181b41919339eb3c</id>
<content type='text'>
then the result could go either way. If it's provably positive then so is the
srem. Fixes PR9343 #7!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127146 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>ConstantInt has some getters which return ConstantInt's or ConstantVector's of</title>
<updated>2011-03-06T03:36:19Z</updated>
<author>
<name>Nick Lewycky</name>
<email>nicholas@mxc.ca</email>
</author>
<published>2011-03-06T03:36:19Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=d01f50f42ce60207ed6d27fb1778e456d83be06c'/>
<id>urn:sha1:d01f50f42ce60207ed6d27fb1778e456d83be06c</id>
<content type='text'>
the value splatted into every element. Extend this to getTrue and getFalse which
by providing new overloads that take Types that are either i1 or &lt;N x i1&gt;. Use
it in InstCombine to add vector support to some code, fixing PR8469!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127116 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Thread comparisons over udiv/sdiv/ashr/lshr exact and lshr nuw/nsw whenever</title>
<updated>2011-03-05T05:19:11Z</updated>
<author>
<name>Nick Lewycky</name>
<email>nicholas@mxc.ca</email>
</author>
<published>2011-03-05T05:19:11Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=58bfcdbcf6a7c1cac0187f7c6beb3afe9d8f5411'/>
<id>urn:sha1:58bfcdbcf6a7c1cac0187f7c6beb3afe9d8f5411</id>
<content type='text'>
possible. This goes into instcombine and instsimplify because instsimplify
doesn't need to check hasOneUse since it returns (almost exclusively) constants.

This fixes PR9343 #4 #5 and #8!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127064 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Try once again to optimize "icmp (srem X, Y), Y" by turning the comparison into</title>
<updated>2011-03-05T04:28:48Z</updated>
<author>
<name>Nick Lewycky</name>
<email>nicholas@mxc.ca</email>
</author>
<published>2011-03-05T04:28:48Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=9feda1730c225589e144fb1f86a86a8cf3f39c9e'/>
<id>urn:sha1:9feda1730c225589e144fb1f86a86a8cf3f39c9e</id>
<content type='text'>
true/false or "icmp slt/sge Y, 0".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127063 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Revert broken srem logic from r126991.</title>
<updated>2011-03-04T19:26:08Z</updated>
<author>
<name>Nick Lewycky</name>
<email>nicholas@mxc.ca</email>
</author>
<published>2011-03-04T19:26:08Z</published>
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<id>urn:sha1:e2ee753bc440d373717b8fd06c062d50f1005268</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127021 91177308-0d34-0410-b5e6-96231b3b80d8
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