llvm/test/MC/X86, branch master http://llvm.org https://git.amat.us/llvm/atom/test/MC/X86?h=master 2013-05-10T18:24:17Z [ms-inline asm] Fix a crasher when we fail on a direct match. 2013-05-10T18:24:17Z Chad Rosier mcrosier@apple.com 2013-05-10T18:24:17Z urn:sha1:ffc49cbea41c08132587a3e622bb65191fa576a2 The issue was that the MatchingInlineAsm and VariantID args to the MatchInstructionImpl function weren't being set properly. Specifically, when parsing intel syntax, the parser thought it was parsing inline assembly in the at&t dialect; that will never be the case. The crash was caused when the emitter tried to emit the instruction, but the operands weren't set. When parsing inline assembly we only set the opcode, not the operands, which is used to lookup the instruction descriptor. rdar://13854391 and PR15945 Also, this commit reverts r176036. Now that we're correctly parsing the intel syntax the pushad/popad don't match properly. I've reimplemented that fix using a MnemonicAlias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181620 91177308-0d34-0410-b5e6-96231b3b80d8 [x86AsmParser] It's valid to stop parsing an operand at an immediate. 2013-05-09T23:48:53Z Chad Rosier mcrosier@apple.com 2013-05-09T23:48:53Z urn:sha1:a70d02ff2841d535875fe80bd3d3c25ba90613da rdar://13854369 and PR15944 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181564 91177308-0d34-0410-b5e6-96231b3b80d8 Add test case for PR15779, which has previously been fixed. 2013-04-22T22:30:01Z Chad Rosier mcrosier@apple.com 2013-04-22T22:30:01Z urn:sha1:f74d82d8e49ec54953c106a89e0a5951466d4e6b git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180058 91177308-0d34-0410-b5e6-96231b3b80d8 [ms-inline asm] Apply the condition code mnemonic aliases to both the Intel and 2013-04-18T23:16:12Z Chad Rosier mcrosier@apple.com 2013-04-18T23:16:12Z urn:sha1:3f1f9c37986953250cbda7a7bfb7123571449be7 AT&T dialect. Test case for r179804 as well. rdar://13674398 and PR13340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179813 91177308-0d34-0410-b5e6-96231b3b80d8 [ms-inline asm] Add support for the minus unary operator. Previously, we were 2013-04-17T21:01:45Z Chad Rosier mcrosier@apple.com 2013-04-17T21:01:45Z urn:sha1:d58f773b96fdb5539d9da2192b8cf2ff6112239f unable to handle cases such as __asm mov eax, 8*-8. This patch also attempts to simplify the state machine. Further, the error reporting has been improved. Test cases included, but more will be added to the clang side shortly. rdar://13668445 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179719 91177308-0d34-0410-b5e6-96231b3b80d8 Add CLAC/STAC instruction encoding/decoding support 2013-04-11T04:52:28Z Michael Liao michael.liao@intel.com 2013-04-11T04:52:28Z urn:sha1:02d2e612521954b5ff7c1ba6fd53e36bc51e1c48 As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8 [ms-inline asm] Add support for numeric displacement expressions in bracketed 2013-04-05T16:28:55Z Chad Rosier mcrosier@apple.com 2013-04-05T16:28:55Z urn:sha1:e112453fc39b97147ea3f23bf0b1973cd9f739b1 memory operands. Essentially, this layers an infix calculator on top of the parsing state machine. The scale on the index register is still expected to be an immediate __asm mov eax, [eax + ebx*4] and will not work with more complex expressions. For example, __asm mov eax, [eax + ebx*(2*2)] The plus and minus binary operators assume the numeric value of a register is zero so as to not change the displacement. Register operands should never be an operand for a multiply or divide operation; the scale*indexreg expression is always replaced with a zero on the operand stack to prevent such a case. rdar://13521380 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178881 91177308-0d34-0410-b5e6-96231b3b80d8 Add support of RDSEED defined in AVX2 extension 2013-03-28T23:41:26Z Michael Liao michael.liao@intel.com 2013-03-28T23:41:26Z urn:sha1:c26392aa5d9c2dbca2909d6874d181455f8aeb8f git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178314 91177308-0d34-0410-b5e6-96231b3b80d8 Move test since it depends on the X86 backend. 2013-03-28T17:01:28Z Rafael Espindola rafael.espindola@gmail.com 2013-03-28T17:01:28Z urn:sha1:30509ee8a348116335475beaf9e5504471c86e73 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178249 91177308-0d34-0410-b5e6-96231b3b80d8 [ms-inline asm] Add support of imm displacement before bracketed memory 2013-03-27T21:49:56Z Chad Rosier mcrosier@apple.com 2013-03-27T21:49:56Z urn:sha1:dd40e8cd54805aa81c8548ac8c87755c562c1723 expression. Specifically, this syntax: ImmDisp [ BaseReg + Scale*IndexReg + Disp ] We don't currently support: ImmDisp [ Symbol ] rdar://13518671 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178186 91177308-0d34-0410-b5e6-96231b3b80d8