llvm/test/MC/Disassembler/ARM, branch testinghttp://llvm.orghttps://git.amat.us/llvm/atom/test/MC/Disassembler/ARM?h=testing2013-02-22T10:01:33ZMake ARMAsmPrinter generate the correct alignment specifier syntax in instructions.2013-02-22T10:01:33ZKristof Beylskristof.beyls@arm.com2013-02-22T10:01:33Zurn:sha1:29e05fe7a885bd03d8570d2bcf14193013776bcd
The Printer will now print instructions with the correct alignment specifier syntax, like
vld1.8 {d16}, [r0:64]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8
Make ARMAsmParser accept the correct alignment specifier syntax in instructions.2013-02-14T14:46:12ZKristof Beylskristof.beyls@arm.com2013-02-14T14:46:12Zurn:sha1:b1d081230e40e5c86f3cc44a7cfd7241732eabfb
The parser will now accept instructions with alignment specifiers written like
vld1.8 {d16}, [r0:64]
, while also still accepting the incorrect syntax
vld1.8 {d16}, [r0, :64]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175164 91177308-0d34-0410-b5e6-96231b3b80d8
Added a option to the disassembler to print immediates as hex.2012-12-05T18:13:19ZKevin Enderbyenderby@apple.com2012-12-05T18:13:19Zurn:sha1:14ccc9007a932a23201251ced4be4c898a62d6a5
This is for the lldb team so most of but not all of the values are
to be printed as hex with this option. Some small values like the
scale in an X86 address were requested to printed in decimal
without the leading 0x.
There may be some tweaks need to places that may still be in
decimal that they want in hex. Specially for arm. I made my best
guess. Any tweaks from here should be simple.
I also did the best I know now with help from the C++ gurus
creating the cleanest formatImm() utility function and containing
the changes. But if someone has a better idea to make something
cleaner I'm all ears and game for changing the implementation.
rdar://8109283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169393 91177308-0d34-0410-b5e6-96231b3b80d8
Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInst2012-11-29T23:47:11ZKevin Enderbyenderby@apple.com2012-11-29T23:47:11Zurn:sha1:1c83093cd5f4f6d33e732c817bb5afd033531beb
which would then cause an assert when printed. rdar://11437956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168960 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: Better disassembly for pc-relative LDR.2012-10-30T01:04:51ZJim Grosbachgrosbach@apple.com2012-10-30T01:04:51Zurn:sha1:8ba1474181fc3997cc8449d75065e1021c72d49b
When the operand is a plain immediate rather than a label, print it
as [pc, #imm] like we do for the Thumb2 wide encoding variant.
rdar://12154503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166991 91177308-0d34-0410-b5e6-96231b3b80d8
Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch target2012-10-29T23:27:20ZKevin Enderbyenderby@apple.com2012-10-29T23:27:20Zurn:sha1:445ba85b8d7bc8fb4689ca22131cadc80a034705
is 24 bits not 20 and the decoding needed to correctly handle converting the
J1 and J2 bits to their I1 and I2 values to reconstruct the displacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166982 91177308-0d34-0410-b5e6-96231b3b80d8
Add support for annotated disassembly output for X86 and arm.2012-10-22T22:31:46ZKevin Enderbyenderby@apple.com2012-10-22T22:31:46Zurn:sha1:3ed0316f756e2f1730f46654776fcf77f5ace7aa
Per the October 12, 2012 Proposal for annotated disassembly output sent out by
Jim Grosbach this set of changes implements this for X86 and arm. The llvm-mc
tool now has a -mdis option to produced the marked up disassembly and a couple
of small example test cases have been added.
rdar://11764962
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166445 91177308-0d34-0410-b5e6-96231b3b80d8
Diagnose invalid alignments on duplicating VLDn instructions.2012-09-06T15:27:12ZTim NorthoverTim.Northover@arm.com2012-09-06T15:27:12Zurn:sha1:24b9f258f194c5e472bf133f9bbf5ca26ad500d3
Patch by Chris Lidbury.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163323 91177308-0d34-0410-b5e6-96231b3b80d8
Check for invalid alignment values when decoding VLDn/VSTn (single ln) instructions.2012-09-06T15:17:49ZTim NorthoverTim.Northover@arm.com2012-09-06T15:17:49Zurn:sha1:eae1d34029c159306ce4a0472294de6cf9baedac
Patch by Chris Lidbury.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163321 91177308-0d34-0410-b5e6-96231b3b80d8
Use correct part of complex operand to encode VST1 alignment.2012-09-06T14:36:55ZTim NorthoverTim.Northover@arm.com2012-09-06T14:36:55Zurn:sha1:64eacd9136dc45e54dd2728117f71403701fd39c
Patch by Chris Lidbury.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163318 91177308-0d34-0410-b5e6-96231b3b80d8