llvm/test/MC/ARM, branch testing

Fix pr13145 - Naming a function like a register name confuses the asm parser.

2013-03-19T23:44:03Z

Patch by Stepan Dyatkovskiy rdar://13457826 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177463 91177308-0d34-0410-b5e6-96231b3b80d8

ARM: permit full range of valid ADR immediates.

2013-02-27T16:43:09Z

This fixes an issue where trying to assemlbe valid ADR instructions would cause LLVM to hit a failed assertion. Patch by Keith Walker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176189 91177308-0d34-0410-b5e6-96231b3b80d8

ARM: Convenience aliases for 'srs*' instructions.

2013-02-23T00:52:09Z

Handle an implied 'sp' operand. rdar://11466783 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175940 91177308-0d34-0410-b5e6-96231b3b80d8

Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.

2013-02-22T10:01:33Z

The Printer will now print instructions with the correct alignment specifier syntax, like vld1.8 {d16}, [r0:64] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8

If bundle alignment is enabled, do not add data to a fragment with instructions

2013-02-15T22:50:52Z

With bundle alignment, instructions all get their own MCFragments (unless they are in a bundle-locked group). For instructions with fixups, this is an MCDataFragment. Emitting actual data (e.g. for .long) attempts to re-use MCDataFragments, which we don't want int this case since it leads to fragments which exceed the bundle size. So, don't reuse them in this case. Also adds a test and fixes some formatting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175316 91177308-0d34-0410-b5e6-96231b3b80d8

The ARM NEON vector compare instructions take three arguments. However, the

2013-02-14T23:18:40Z

assembler should also accept a two arg form, as the docuemntation specifies that the first (destination) register is optional. This patch uses TwoOperandAliasConstraint to add the two argument form. It also fixes an 80-column formatting problem in: test/MC/ARM/neon-bitwise-encoding Clang rejects ARM NEON assembly instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175221 91177308-0d34-0410-b5e6-96231b3b80d8

Make ARMAsmParser accept the correct alignment specifier syntax in instructions.

2013-02-14T14:46:12Z

The parser will now accept instructions with alignment specifiers written like vld1.8 {d16}, [r0:64] , while also still accepting the incorrect syntax vld1.8 {d16}, [r0, :64] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175164 91177308-0d34-0410-b5e6-96231b3b80d8

Add a special ARM trap encoding for NaCl.

2013-01-30T16:30:19Z

More details in this thread: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130128/163783.html Patch by JF Bastien git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173943 91177308-0d34-0410-b5e6-96231b3b80d8

This patch implements runtime ARM specific

2013-01-30T02:24:33Z

setting of ELF header e_flags. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173885 91177308-0d34-0410-b5e6-96231b3b80d8

This patch reworks how llvm targets set

2013-01-30T02:09:52Z

and update ELF header e_flags. Currently gathering information such as symbol, section and data is done by collecting it in an MCAssembler object. From MCAssembler and MCAsmLayout objects ELFObjectWriter::WriteObject() forms and streams out the ELF object file. This patch just adds a few members to the MCAssember class to store and access the e_flag settings. It allows for runtime additions to the e_flag by assembler directives. The standalone assembler can get to MCAssembler from getParser().getStreamer().getAssembler(). This patch is the generic infrastructure and will be followed by patches for ARM and Mips for their target specific use. Contributer: Jack Carter git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173882 91177308-0d34-0410-b5e6-96231b3b80d8