llvm/test/CodeGen, branch release_30

Merging r143194:

2011-11-01T05:08:55Z

------------------------------------------------------------------------ r143194 | chapuni | 2011-10-28 07:12:22 -0700 (Fri, 28 Oct 2011) | 7 lines Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neutral. Don't assume APInt::getRawData() would hold target-aware endianness nor host-compliant endianness. rawdata[0] holds most lower i64, even on big endian host. FIXME: Add a testcase for big endian target. FIXME: Ditto on CompileUnit::addConstantFPValue() ? ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@143449 91177308-0d34-0410-b5e6-96231b3b80d8

Merging r143247:

2011-10-29T01:20:35Z

------------------------------------------------------------------------ r143247 | chapuni | 2011-10-28 16:11:03 -0700 (Fri, 28 Oct 2011) | 1 line test/CodeGen/PowerPC/2008-10-17-AsmMatchingOperands.ll: [PR11218] Mark "REQUIRES: asserts" for now. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@143272 91177308-0d34-0410-b5e6-96231b3b80d8

Merging r142869:

2011-10-24T23:06:48Z

------------------------------------------------------------------------ r142869 | void | 2011-10-24 16:05:43 -0700 (Mon, 24 Oct 2011) | 4 lines Check the visibility of the global variable before placing it into the stubs table. A hidden variable could potentially end up in both lists. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142870 91177308-0d34-0410-b5e6-96231b3b80d8

Merging r142550:

2011-10-19T23:49:38Z

------------------------------------------------------------------------ r142550 | evancheng | 2011-10-19 15:22:54 -0700 (Wed, 19 Oct 2011) | 1 line Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10291355 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142555 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixes PR11129.

2011-10-14T23:58:49Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142022 91177308-0d34-0410-b5e6-96231b3b80d8

Update live-in lists when splitting critical edges.

2011-10-14T17:25:46Z

Fixes PR10814. Patch by Jan Sjödin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141960 91177308-0d34-0410-b5e6-96231b3b80d8

Add X86 ANDN instruction. Including instruction selection.

2011-10-14T07:06:56Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141947 91177308-0d34-0410-b5e6-96231b3b80d8

Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell.

2011-10-14T03:21:46Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141939 91177308-0d34-0410-b5e6-96231b3b80d8

Add value numbers when spilling dead defs.

2011-10-14T00:34:31Z

When spilling around an instruction with a dead def, remember to add a value number for the def. The missing value number wouldn't normally create problems since there would be an incoming live range as well. However, due to another bug we could spill a dead V_SET0 instruction which doesn't read any values. The missing value number caused an empty live range to be created which is dangerous since it doesn't interfere with anything. This fixes part of PR11125. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141923 91177308-0d34-0410-b5e6-96231b3b80d8

Force CPU type on test so it doesn't accidentally emit movbe instead of bswap on Intel Atom CPUs.

2011-10-13T14:27:54Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141863 91177308-0d34-0410-b5e6-96231b3b80d8