<feed xmlns='http://www.w3.org/2005/Atom'>
<title>llvm/test/CodeGen, branch release_28</title>
<subtitle>http://llvm.org</subtitle>
<id>https://git.amat.us/llvm/atom/test/CodeGen?h=release_28</id>
<link rel='self' href='https://git.amat.us/llvm/atom/test/CodeGen?h=release_28'/>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/'/>
<updated>2010-09-10T10:21:50Z</updated>
<entry>
<title>Approved by Evan.</title>
<updated>2010-09-10T10:21:50Z</updated>
<author>
<name>Bill Wendling</name>
<email>isanbard@gmail.com</email>
</author>
<published>2010-09-10T10:21:50Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=3c941a5acb0c466307af6c585339ab588e290395'/>
<id>urn:sha1:3c941a5acb0c466307af6c585339ab588e290395</id>
<content type='text'>
$ svn merge -c 113576 https://llvm.org/svn/llvm-project/llvm/trunk
--- Merging r113576 into '.':
U    test/CodeGen/ARM/2007-01-19-InfiniteLoop.ll
U    lib/Target/ARM/ARMLoadStoreOptimizer.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_28@113583 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Remove the rest of the nonexistent 64-bit AVX instructions.</title>
<updated>2010-09-03T21:23:00Z</updated>
<author>
<name>Dale Johannesen</name>
<email>dalej@apple.com</email>
</author>
<published>2010-09-03T21:23:00Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=caa9ba228d9d8326cd54457be6e9c2ae313db75c'/>
<id>urn:sha1:caa9ba228d9d8326cd54457be6e9c2ae313db75c</id>
<content type='text'>
Bruno, please review.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113014 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Re-apply r112883:</title>
<updated>2010-09-03T18:37:12Z</updated>
<author>
<name>Jim Grosbach</name>
<email>grosbach@apple.com</email>
</author>
<published>2010-09-03T18:37:12Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=65482b1bb873dd820f54a24a2f34bd65f2669e5c'/>
<id>urn:sha1:65482b1bb873dd820f54a24a2f34bd65f2669e5c</id>
<content type='text'>
"For ARM stack frames that utilize variable sized objects and have either
large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs."

r112986 fixed a latent bug exposed by the above.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112989 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Revert "For ARM stack frames that utilize variable sized objects and have either", it is breaking oggenc with Clang for ARMv6.</title>
<updated>2010-09-03T15:26:42Z</updated>
<author>
<name>Daniel Dunbar</name>
<email>daniel@zuster.org</email>
</author>
<published>2010-09-03T15:26:42Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=6a8700301ca6f8f2f5f787c8d1f5206a7dfceed6'/>
<id>urn:sha1:6a8700301ca6f8f2f5f787c8d1f5206a7dfceed6</id>
<content type='text'>
This reverts commit 8d6e29cfda270be483abf638850311670829ee65.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112962 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>test/CodeGen/X86: Add explicit -mtriple=(i686|x86_64)-linux for Win32 host.</title>
<updated>2010-09-03T03:24:08Z</updated>
<author>
<name>NAKAMURA Takumi</name>
<email>geek4civic@gmail.com</email>
</author>
<published>2010-09-03T03:24:08Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=9dceb1305cb3366e20ce27f0370c19adf13c6b0c'/>
<id>urn:sha1:9dceb1305cb3366e20ce27f0370c19adf13c6b0c</id>
<content type='text'>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112947 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>AVX doesn't support mm operations neither its instrinsics.</title>
<updated>2010-09-03T02:08:45Z</updated>
<author>
<name>Bruno Cardoso Lopes</name>
<email>bruno.cardoso@gmail.com</email>
</author>
<published>2010-09-03T02:08:45Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=95f1e2d6b52d55773bca16a5d3b7b283344dc47d'/>
<id>urn:sha1:95f1e2d6b52d55773bca16a5d3b7b283344dc47d</id>
<content type='text'>
The AVX versions of PALIGN and PABS* should only exist for
128-bit. Remove the unnecessary stuff.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112944 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Replace NEON vabdl, vaba, and vabal intrinsics with combinations of the</title>
<updated>2010-09-03T01:35:08Z</updated>
<author>
<name>Bob Wilson</name>
<email>bob.wilson@apple.com</email>
</author>
<published>2010-09-03T01:35:08Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=eb0c3d372906df9c61a31651a0ba278034447e94'/>
<id>urn:sha1:eb0c3d372906df9c61a31651a0ba278034447e94</id>
<content type='text'>
vabd intrinsic and add and/or zext operations.  In the case of vaba, this
also avoids the need for a DAG combine pattern to combine vabd with add.
Update tests.  Auto-upgrade the old intrinsics.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112941 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Properly emit __chkstk call instead of __alloca on non-mingw windows targets.</title>
<updated>2010-09-02T23:03:46Z</updated>
<author>
<name>Anton Korobeynikov</name>
<email>asl@math.spbu.ru</email>
</author>
<published>2010-09-02T23:03:46Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=ace53f2fbc65f1e26c084c733ffbdbe3516580a6'/>
<id>urn:sha1:ace53f2fbc65f1e26c084c733ffbdbe3516580a6</id>
<content type='text'>
Patch by Cameron Esfahani!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112902 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>For ARM stack frames that utilize variable sized objects and have either</title>
<updated>2010-09-02T22:29:01Z</updated>
<author>
<name>Jim Grosbach</name>
<email>grosbach@apple.com</email>
</author>
<published>2010-09-02T22:29:01Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=1755b3964f931bdd6fa9b4c0138f666ccfa12aca'/>
<id>urn:sha1:1755b3964f931bdd6fa9b4c0138f666ccfa12aca</id>
<content type='text'>
large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs.

rdar://7352504
rdar://8374540
rdar://8355680



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112883 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
<entry>
<title>Don't narrow the load and store in a load+twiddle+store sequence unless</title>
<updated>2010-09-02T21:18:42Z</updated>
<author>
<name>Dan Gohman</name>
<email>gohman@apple.com</email>
</author>
<published>2010-09-02T21:18:42Z</published>
<link rel='alternate' type='text/html' href='https://git.amat.us/llvm/commit/?id=24bde5bce192119ee0fc4f94ef8757fd4031e5f6'/>
<id>urn:sha1:24bde5bce192119ee0fc4f94ef8757fd4031e5f6</id>
<content type='text'>
there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.

This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
</content>
</entry>
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