llvm/test/CodeGen/XCore, branch release_29 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/XCore?h=release_29 2011-03-04T20:03:14Z Be nice to Xcore and the XMOS assembler and avoid quoting section names 2011-03-04T20:03:14Z Joerg Sonnenberger joerg@bec.de 2011-03-04T20:03:14Z urn:sha1:89e0f386f3c8bafbbae05d7d32695ce571617397 that contain only letters, digits and the characters "_" and ".". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127028 91177308-0d34-0410-b5e6-96231b3b80d8 Bug#9033: For the ELF assembler output, always quote the section name. 2011-03-03T22:31:08Z Joerg Sonnenberger joerg@bec.de 2011-03-03T22:31:08Z urn:sha1:ea83b133503afcd6589cf317cbb54ccd9e100f57 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126963 91177308-0d34-0410-b5e6-96231b3b80d8 Add XCore intrinsic for eeu instruction. 2011-02-24T13:39:18Z Richard Osborne richard@xmos.com 2011-02-24T13:39:18Z urn:sha1:21d7eb3f3b4442cf3bcb4c7fcd279364bba91fc3 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126384 91177308-0d34-0410-b5e6-96231b3b80d8 Add XCore intrinsic for clre instruction. 2011-02-23T18:52:05Z Richard Osborne richard@xmos.com 2011-02-23T18:52:05Z urn:sha1:d04b4937d1bc4ed14642926321127e9922e66c3b git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126322 91177308-0d34-0410-b5e6-96231b3b80d8 Add llvm.xcore.waitevent intrinsic. The effect of this intrinsic is to enable 2011-02-23T18:35:59Z Richard Osborne richard@xmos.com 2011-02-23T18:35:59Z urn:sha1:9935bd0819dcc3fe316a7c5c25ee245540df2ecf events on the thread and wait until a resource is ready to event. The vector of the resource that is ready is returned. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126320 91177308-0d34-0410-b5e6-96231b3b80d8 Add XCore intrinsic for the setv instruction. 2011-02-23T16:46:37Z Richard Osborne richard@xmos.com 2011-02-23T16:46:37Z urn:sha1:292f62e06f15eb45008c6965a5d9f7e9713431e9 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126315 91177308-0d34-0410-b5e6-96231b3b80d8 Add XCore intrinsic for settw instruction. 2011-02-23T14:45:03Z Richard Osborne richard@xmos.com 2011-02-23T14:45:03Z urn:sha1:2a2cb2852632f2008acdd43a7a6501fc5c6b951c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126313 91177308-0d34-0410-b5e6-96231b3b80d8 Add XCore intrinsics for various instructions on ports. 2011-02-21T18:23:30Z Richard Osborne richard@xmos.com 2011-02-21T18:23:30Z urn:sha1:d83318450b96c143e8242e6676eafe55a2539cbc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126132 91177308-0d34-0410-b5e6-96231b3b80d8 Add intrinsic for setc instruction on the XCore. 2011-02-09T13:22:12Z Richard Osborne richard@xmos.com 2011-02-09T13:22:12Z urn:sha1:59982f3ffcc853a2c66ef674c601ee61dbe205a5 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125186 91177308-0d34-0410-b5e6-96231b3b80d8 Add XCore intrinsics for resource instructions. 2011-02-03T13:14:25Z Richard Osborne richard@xmos.com 2011-02-03T13:14:25Z urn:sha1:17c1e51d223c8f5ac2446b37495e0aa124dedbe9 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124794 91177308-0d34-0410-b5e6-96231b3b80d8