llvm/test/CodeGen/XCore, branch release_26 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/XCore?h=release_26 2009-08-18T21:14:31Z Add support for mergeable sections back into the XCore backend. 2009-08-18T21:14:31Z Richard Osborne richard@xmos.com 2009-08-18T21:14:31Z urn:sha1:1123135dbfa776bbe4c2120a16098d81e0850a76 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79368 91177308-0d34-0410-b5e6-96231b3b80d8 Put data with relocations in the same sections as data without relocations. 2009-08-18T17:58:17Z Richard Osborne richard@xmos.com 2009-08-18T17:58:17Z urn:sha1:a9e83348770deaf7c187ff842aa9b467f813bf55 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79351 91177308-0d34-0410-b5e6-96231b3b80d8 Update getSectionForConstant() to to allow mergable sections to be nulled out 2009-08-17T16:37:11Z Richard Osborne richard@xmos.com 2009-08-17T16:37:11Z urn:sha1:2a5e23b44ddf1efde1d98bd3379489d93a90d55a if not supported by the ELF subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79249 91177308-0d34-0410-b5e6-96231b3b80d8 use XCore-specific section with xcore specific cp/dp flags to restore 2009-08-15T06:09:35Z Chris Lattner sabre@nondot.org 2009-08-15T06:09:35Z urn:sha1:760e24cd0514d4459eb2802d81472432f688de09 support for globals going into the appropriate sections with the flags. This hopefully finishes unbreaking the previous behavior that I broke before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79079 91177308-0d34-0410-b5e6-96231b3b80d8 Add extra SEXT pattern. 2009-08-02T22:45:24Z Richard Osborne richard@xmos.com 2009-08-02T22:45:24Z urn:sha1:d558ea5e0af2103e5d0d6db2445b8dcebda70234 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77920 91177308-0d34-0410-b5e6-96231b3b80d8 switch off of 'Section' onto MCSection. We're not properly using 2009-07-31T18:48:30Z Chris Lattner sabre@nondot.org 2009-07-31T18:48:30Z urn:sha1:a87dea4f8c546ca748f1777a8d1cabcc06515d91 MCSection subclasses yet, but this is a step in the right direction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77708 91177308-0d34-0410-b5e6-96231b3b80d8 Add tests for handling of globals and tls on the XCore. These currently fail 2009-07-24T00:38:20Z Richard Osborne richard@xmos.com 2009-07-24T00:38:20Z urn:sha1:e23e0976c71775dba8e45e3c6eb6f316359939e5 but pass when run against r76652. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76923 91177308-0d34-0410-b5e6-96231b3b80d8 Combine an unaligned store of unaligned load into a memmove. 2009-07-16T12:50:48Z Richard Osborne richard@xmos.com 2009-07-16T12:50:48Z urn:sha1:db9e697725e81edb4c5cb80f8dc7b412431be0d0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75908 91177308-0d34-0410-b5e6-96231b3b80d8 Expand unaligned 32 bit loads from an address which is a constant 2009-07-16T10:42:35Z Richard Osborne richard@xmos.com 2009-07-16T10:42:35Z urn:sha1:ccb7e96ef0ef743c822ce19aac324b429198bff2 offset from a 32 bit aligned base as follows: ldw low, base[offset >> 2] ldw high, base[(offset >> 2) + 1] shr low_shifted, low, (offset & 0x3) * 8 shl high_shifted, high, 32 - (offset & 0x3) * 8 or result, low_shifted, high_shifted Expand 32 bit loads / stores with 16 bit alignment into two 16 bit loads / stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75902 91177308-0d34-0410-b5e6-96231b3b80d8 Custom lower unaligned 32 bit stores and loads into libcalls. This is 2009-07-16T10:21:18Z Richard Osborne richard@xmos.com 2009-07-16T10:21:18Z urn:sha1:7f47ce966219b8dbc37cf8c289660dd83923289f a big code size win since before they were expanding to upto 16 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75901 91177308-0d34-0410-b5e6-96231b3b80d8