llvm/test/CodeGen/X86, branch release_30 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/X86?h=release_30 2011-11-01T05:08:55Z Merging r143194: 2011-11-01T05:08:55Z Bill Wendling isanbard@gmail.com 2011-11-01T05:08:55Z urn:sha1:31491eecf75a450ae33ff35d49f1a86535d704b1 ------------------------------------------------------------------------ r143194 | chapuni | 2011-10-28 07:12:22 -0700 (Fri, 28 Oct 2011) | 7 lines Dwarf: [PR11022] Fix emitting DW_AT_const_value(>i64), to be host-endian-neutral. Don't assume APInt::getRawData() would hold target-aware endianness nor host-compliant endianness. rawdata[0] holds most lower i64, even on big endian host. FIXME: Add a testcase for big endian target. FIXME: Ditto on CompileUnit::addConstantFPValue() ? ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@143449 91177308-0d34-0410-b5e6-96231b3b80d8 Merging r142550: 2011-10-19T23:49:38Z Bill Wendling isanbard@gmail.com 2011-10-19T23:49:38Z urn:sha1:bab41201fb1c51fbb5dbf06ad952dde4ccc1929d ------------------------------------------------------------------------ r142550 | evancheng | 2011-10-19 15:22:54 -0700 (Wed, 19 Oct 2011) | 1 line Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10291355 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142555 91177308-0d34-0410-b5e6-96231b3b80d8 Update live-in lists when splitting critical edges. 2011-10-14T17:25:46Z Jakob Stoklund Olesen stoklund@2pi.dk 2011-10-14T17:25:46Z urn:sha1:ac7caa0d436fa9fe96234c4e009cdacd7cd6b124 Fixes PR10814. Patch by Jan Sjödin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141960 91177308-0d34-0410-b5e6-96231b3b80d8 Add X86 ANDN instruction. Including instruction selection. 2011-10-14T07:06:56Z Craig Topper craig.topper@gmail.com 2011-10-14T07:06:56Z urn:sha1:54a11176f6a5e07e243f1d87ba19ac3f4681976b git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141947 91177308-0d34-0410-b5e6-96231b3b80d8 Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell. 2011-10-14T03:21:46Z Craig Topper craig.topper@gmail.com 2011-10-14T03:21:46Z urn:sha1:909652f6876a97d63db20606cd1b37e95d016caf git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141939 91177308-0d34-0410-b5e6-96231b3b80d8 Add value numbers when spilling dead defs. 2011-10-14T00:34:31Z Jakob Stoklund Olesen stoklund@2pi.dk 2011-10-14T00:34:31Z urn:sha1:a80444f88d88d88513b096c97474c453a4c3bcf6 When spilling around an instruction with a dead def, remember to add a value number for the def. The missing value number wouldn't normally create problems since there would be an incoming live range as well. However, due to another bug we could spill a dead V_SET0 instruction which doesn't read any values. The missing value number caused an empty live range to be created which is dangerous since it doesn't interfere with anything. This fixes part of PR11125. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141923 91177308-0d34-0410-b5e6-96231b3b80d8 Force CPU type on test so it doesn't accidentally emit movbe instead of bswap on Intel Atom CPUs. 2011-10-13T14:27:54Z Benjamin Kramer benny.kra@googlemail.com 2011-10-13T14:27:54Z urn:sha1:d38e99e9490e3d891e1937e64ae837a392681df0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141863 91177308-0d34-0410-b5e6-96231b3b80d8 More closely follow libgcc, which has code after the `ret' instruction to 2011-10-13T08:24:19Z Bill Wendling isanbard@gmail.com 2011-10-13T08:24:19Z urn:sha1:4e68054b20725f6ec1cac33630258f749fe5debe release the stack segment and reset the stack pointer. Place the code in its own MBB to make the verifier happy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141859 91177308-0d34-0410-b5e6-96231b3b80d8 Revert r141854 because it was causing failures: 2011-10-13T07:48:07Z Bill Wendling isanbard@gmail.com 2011-10-13T07:48:07Z urn:sha1:1203fe7fc80d0fe16a30ae3ddb9b0823b17f39ce http://lab.llvm.org:8011/builders/llvm-x86_64-linux/builds/101 --- Reverse-merging r141854 into '.': U test/MC/Disassembler/X86/x86-32.txt U test/MC/Disassembler/X86/simple-tests.txt D test/CodeGen/X86/bmi.ll U lib/Target/X86/X86InstrInfo.td U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86.td U lib/Target/X86/X86Subtarget.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141857 91177308-0d34-0410-b5e6-96231b3b80d8 Should not add instructions to a BB after a return instruction. The machine instruction verifier doesn't like this, nor do I. 2011-10-13T07:42:32Z Bill Wendling isanbard@gmail.com 2011-10-13T07:42:32Z urn:sha1:82222c20be24adda7c218f3fdaf2e0ae049c955b git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141856 91177308-0d34-0410-b5e6-96231b3b80d8