llvm/test/CodeGen/X86, branch masterhttp://llvm.orghttps://git.amat.us/llvm/atom/test/CodeGen/X86?h=master2013-05-10T14:09:52ZDAGCombiner: Generate a correct constant for vector types when folding (xor (and)) into (and (not)).2013-05-10T14:09:52ZBenjamin Kramerbenny.kra@googlemail.com2013-05-10T14:09:52Zurn:sha1:768ebcdf631baa1b18dc65a5983a237b307a99c2
PR15948.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
Teach SelectionDAG to constant fold all-constant FMA nodes the same way that it constant folds FADD, FMUL, etc.2013-05-09T22:27:13ZOwen Andersonresistor@mac.com2013-05-09T22:27:13Zurn:sha1:58dcd200b7f0ea01160b6159e0363cc96b1b83d9
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
Generate a compact unwind encoding in the face of a stack alignment push.2013-05-09T20:10:38ZBill Wendlingisanbard@gmail.com2013-05-09T20:10:38Zurn:sha1:edfef3bd27d6269d473fbc570e8c2be02b4070df
We generate a `push' of a random register (%rax) if the stack needs to be
aligned by the size of that register. However, this could mess up compact unwind
generation. In particular, we want to still generate compact unwind in the
presence of this monstrosity.
Check if the push of of the %rax/%eax register. If it is and it's marked with
the `FrameSetup' flag, then we can generate a compact unwind encoding for the
function only if the push is the last FrameSetup instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181540 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst2013-05-08T09:00:10ZNick Lewyckynicholas@mxc.ca2013-05-08T09:00:10Zurn:sha1:ae9f07e0b8332181e9a79cffc7dea99f3bc9bea8
by switching to a ValueMap. Patch by Andrea DiBiagio!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181397 91177308-0d34-0410-b5e6-96231b3b80d8
DAGCombiner: Simplify inverted bit tests2013-05-08T06:44:42ZDavid Majnemerdavid.majnemer@gmail.com2013-05-08T06:44:42Zurn:sha1:363160a6be82df343fa60aa09d9d8f8f44605529
Fold (xor (and x, y), y) -> (and (not x), y)
This removes an opportunity for a constant to appear twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181395 91177308-0d34-0410-b5e6-96231b3b80d8
Reduce attributes.2013-05-06T20:57:23ZBill Wendlingisanbard@gmail.com2013-05-06T20:57:23Zurn:sha1:d87dceb8d63a15531d775b02a0fb854178931e99
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181245 91177308-0d34-0410-b5e6-96231b3b80d8
Fix slightly too aggressive conact_vector optimization.2013-05-06T08:06:13ZMichael Kupersteinmichael.m.kuperstein@intel.com2013-05-06T08:06:13Zurn:sha1:2720248ae5b0201a7bdba57f3625869b578f2a5d
(Would sometimes optimize away conacts used to extend a vector with undef values)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181186 91177308-0d34-0410-b5e6-96231b3b80d8
Add a testcase that checks that we generate functions with frame2013-05-06T05:45:57ZBill Wendlingisanbard@gmail.com2013-05-06T05:45:57Zurn:sha1:10c6d2c84c266ffb24ec1037e51fe79e579ecb60
pointers or not depending upon the function attributes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181180 91177308-0d34-0410-b5e6-96231b3b80d8
Remove a recently redundant transform from X86ISelLowering.2013-05-05T02:00:10ZDavid Majnemerdavid.majnemer@gmail.com2013-05-05T02:00:10Zurn:sha1:526f3ed7da88aa02bed42fe2238a60e3be64446b
X86ISelLowering has support to treat:
(icmp ne (and (xor %flags, -1), (shl 1, flag)), 0)
as if it were actually:
(icmp eq (and %flags, (shl 1, flag)), 0)
However, r179386 has code at the InstCombine level to handle this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181145 91177308-0d34-0410-b5e6-96231b3b80d8
TBAA: remove !tbaa from testing cases if not used.2013-05-02T18:11:35ZManman Renmren@apple.com2013-05-02T18:11:35Zurn:sha1:436849be6acc1b8fe28d27dac9baa49129710fb3
This will make it easier to turn on struct-path aware TBAA since the metadata
format will change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180935 91177308-0d34-0410-b5e6-96231b3b80d8