llvm/test/CodeGen/X86/inline-asm-fpstack.ll, branch release_27 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/X86/inline-asm-fpstack.ll?h=release_27 2009-09-08T23:54:48Z Eliminate more uses of llvm-as and llvm-dis. 2009-09-08T23:54:48Z Dan Gohman gohman@apple.com 2009-09-08T23:54:48Z urn:sha1:36a0947820fd4aa4b8a5fa26e3f079bdf572bc81 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04T22:49:04Z Dan Gohman gohman@apple.com 2009-06-04T22:49:04Z urn:sha1:ae3a0be92e33bc716722aa600983fc1535acb122 integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8 Implement basic support for the 'f' register class constraint. This basically 2008-03-11T19:50:13Z Chris Lattner sabre@nondot.org 2008-03-11T19:50:13Z urn:sha1:e12ecf272d90c366e15531c15b6681ab5399ba33 works, but probably won't if you mix it with 't' or 'u' yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48243 91177308-0d34-0410-b5e6-96231b3b80d8 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from 2008-03-09T09:15:31Z Chris Lattner sabre@nondot.org 2008-03-09T09:15:31Z urn:sha1:f30e1cf9b7f96395768e710b4707ecd5587e1185 an RFP register class. Teach ScheduleDAG how to handle CopyToReg with different src/dst reg classes. This allows us to compile trivial inline asms that expect stuff on the top of x87-fp stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8 Add ScheduleDAG support for copytoreg where the src/dst register are 2008-03-09T08:49:15Z Chris Lattner sabre@nondot.org 2008-03-09T08:49:15Z urn:sha1:02b6d25a2702d8857b82d333f290550e3c6ec4dc in different register classes, e.g. copy of ST(0) to RFP*. This gets some really trivial inline asm working that plops things on the top of stack (PR879) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8