llvm/test/CodeGen/X86/fast-isel.ll, branch release_27 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/X86/fast-isel.ll?h=release_27 2010-01-12T17:46:16Z Revert commit 93204, since it causes the assembler to barf 2010-01-12T17:46:16Z Duncan Sands baldrick@free.fr 2010-01-12T17:46:16Z urn:sha1:796248fdb197b29f427819cc85a98bfad52c95ce on x86-64 linux with messages like this: Error: Incorrect register `%r14' used with `l' suffix git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93242 91177308-0d34-0410-b5e6-96231b3b80d8 Add manual ISD::OR fastisel selection routines. TableGen is no longer autogen them after 93152 and 93191. 2010-01-11T22:59:27Z Evan Cheng evan.cheng@apple.com 2010-01-11T22:59:27Z urn:sha1:b85071c7368199e9a5257992cbeff1eb63473f08 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93204 91177308-0d34-0410-b5e6-96231b3b80d8 Extend r93152 to work on OR r, r. If the source set bits are known not to overlap, then select as an ADD instead. 2010-01-11T22:03:29Z Evan Cheng evan.cheng@apple.com 2010-01-11T22:03:29Z urn:sha1:199c4240feedec2f9dbd0d4c4c0a32fa46e50270 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93191 91177308-0d34-0410-b5e6-96231b3b80d8 Eliminate more uses of llvm-as and llvm-dis. 2009-09-08T23:54:48Z Dan Gohman gohman@apple.com 2009-09-08T23:54:48Z urn:sha1:36a0947820fd4aa4b8a5fa26e3f079bdf572bc81 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8 X86FastISel support for loading and storing values of type i1. 2009-08-27T00:31:47Z Dan Gohman gohman@apple.com 2009-08-27T00:31:47Z urn:sha1:7e7f06e70a07be4a5fad81883da6bebf33e1b3f6 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80186 91177308-0d34-0410-b5e6-96231b3b80d8 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04T22:49:04Z Dan Gohman gohman@apple.com 2009-06-04T22:49:04Z urn:sha1:ae3a0be92e33bc716722aa600983fc1535acb122 integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8 Add a few more ptrtoint/inttoptr cast tests. 2009-03-13T23:54:51Z Dan Gohman gohman@apple.com 2009-03-13T23:54:51Z urn:sha1:d00d2feab2ddb3d0c89f6ca20c0a04216ddc77e9 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66989 91177308-0d34-0410-b5e6-96231b3b80d8 Improve FastISel's handling of truncates to i1, and implement 2009-03-13T23:53:06Z Dan Gohman gohman@apple.com 2009-03-13T23:53:06Z urn:sha1:474d3b3f40e117a66946e9fb9d2016b4c05caef0 ptrtoint and inttoptr in X86FastISel. These casts aren't always handled in the generic FastISel code because X86 sometimes needs custom code to do truncation and zero-extension. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66988 91177308-0d34-0410-b5e6-96231b3b80d8 Load from GV stub should be locally CSE'd. 2008-09-04T06:18:33Z Evan Cheng evan.cheng@apple.com 2008-09-04T06:18:33Z urn:sha1:373d50af1df0eb853f0773cd734f7078a0b139fd git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55763 91177308-0d34-0410-b5e6-96231b3b80d8 Add X86 target hook to implement load (even from GlobalAddress). 2008-09-03T06:44:39Z Evan Cheng evan.cheng@apple.com 2008-09-03T06:44:39Z urn:sha1:8b19e56051c45c3e48523238a5a0f33bbac0115d git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55693 91177308-0d34-0410-b5e6-96231b3b80d8