llvm/test/CodeGen/Thumb, branch release_28http://llvm.orghttps://git.amat.us/llvm/atom/test/CodeGen/Thumb?h=release_282010-09-03T18:37:12ZRe-apply r112883:2010-09-03T18:37:12ZJim Grosbachgrosbach@apple.com2010-09-03T18:37:12Zurn:sha1:65482b1bb873dd820f54a24a2f34bd65f2669e5c
"For ARM stack frames that utilize variable sized objects and have either
large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs."
r112986 fixed a latent bug exposed by the above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112989 91177308-0d34-0410-b5e6-96231b3b80d8
Revert "For ARM stack frames that utilize variable sized objects and have either", it is breaking oggenc with Clang for ARMv6.2010-09-03T15:26:42ZDaniel Dunbardaniel@zuster.org2010-09-03T15:26:42Zurn:sha1:6a8700301ca6f8f2f5f787c8d1f5206a7dfceed6
This reverts commit 8d6e29cfda270be483abf638850311670829ee65.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112962 91177308-0d34-0410-b5e6-96231b3b80d8
For ARM stack frames that utilize variable sized objects and have either2010-09-02T22:29:01ZJim Grosbachgrosbach@apple.com2010-09-02T22:29:01Zurn:sha1:1755b3964f931bdd6fa9b4c0138f666ccfa12aca
large local stack areas or require dynamic stack realignment, allocate a
base register via which to access the local frame. This allows efficient
access to frame indices not accessible via the FP (either due to being out
of range or due to dynamic realignment) or the SP (due to variable sized
object allocation). In particular, this greatly improves efficiency of access
to spill slots in Thumb functions which contain VLAs.
rdar://7352504
rdar://8374540
rdar://8355680
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112883 91177308-0d34-0410-b5e6-96231b3b80d8
Update test for 1126092010-08-31T17:58:47ZJim Grosbachgrosbach@apple.com2010-08-31T17:58:47Zurn:sha1:85e75afc8e98f67a05a626f59af05252fb23416d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112610 91177308-0d34-0410-b5e6-96231b3b80d8
Correct bogus module triple specifications.2010-08-30T10:48:29ZDuncan Sandsbaldrick@free.fr2010-08-30T10:48:29Zurn:sha1:cdd4f8c7cb0e5aa6e8d2b73f668c459936fe11d3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112469 91177308-0d34-0410-b5e6-96231b3b80d8
Enable pre-RA virtual frame base register allocation. rdar://82778902010-08-26T00:58:06ZJim Grosbachgrosbach@apple.com2010-08-26T00:58:06Zurn:sha1:ae47c6d69e2e34bc558a302586cbc3f27a6d7334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112127 91177308-0d34-0410-b5e6-96231b3b80d8
Fix test and re-enable it.2010-08-11T17:25:51ZEvan Chengevan.cheng@apple.com2010-08-11T17:25:51Zurn:sha1:e1f0859789034c2de0eb88e0e25fd9e761ad25ba
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110829 91177308-0d34-0410-b5e6-96231b3b80d8
Temporarily disable some failing tests, until they can be2010-08-11T15:09:00ZDan Gohmangohman@apple.com2010-08-11T15:09:00Zurn:sha1:f63fed141ec2402a7f028498b07ca7d49113b61c
properly investigated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110808 91177308-0d34-0410-b5e6-96231b3b80d8
Add ARM Archv6M and let it implies FeatureDB (having dmb, etc.)2010-08-11T06:51:54ZEvan Chengevan.cheng@apple.com2010-08-11T06:51:54Zurn:sha1:d6b463225674c10511b00f8f631a89b6da5afc54
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110795 91177308-0d34-0410-b5e6-96231b3b80d8
Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit2010-08-11T06:30:38ZEvan Chengevan.cheng@apple.com2010-08-11T06:30:38Zurn:sha1:c7569ed4e43a25aa52cf3b5580f1ee00d7d5db96
instructions: dmb, dsb, isb, msr, and mrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110786 91177308-0d34-0410-b5e6-96231b3b80d8