llvm/test/CodeGen/Thumb2, branch release_33

TBAA: remove !tbaa from testing cases if not used.

2013-04-30T17:52:57Z

This will make it easier to turn on struct-path aware TBAA since the metadata format will change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180796 91177308-0d34-0410-b5e6-96231b3b80d8

SDAG: Handle scalarizing an extend of a <1 x iN> vector.

2013-03-07T05:47:54Z

Just scalarize the element and rebuild a vector of the result type from that. rdar://13281568 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176614 91177308-0d34-0410-b5e6-96231b3b80d8

ARM: Creating a vector from a lane of another.

2013-03-02T20:16:24Z

The VDUP instruction source register doesn't allow a non-constant lane index, so make sure we don't construct a ARM::VDUPLANE node asking it to do so. rdar://13328063 http://llvm.org/bugs/show_bug.cgi?id=13963 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176413 91177308-0d34-0410-b5e6-96231b3b80d8

Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.

2013-02-22T10:01:33Z

The Printer will now print instructions with the correct alignment specifier syntax, like vld1.8 {d16}, [r0:64] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175884 91177308-0d34-0410-b5e6-96231b3b80d8

Make RAFast::UsedInInstr indexed by register units.

2013-02-21T19:35:21Z

This fixes some problems with too conservative checking where we were marking all aliases of a register as used, and then also checking all aliases when allocating a register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8

ARM: Allocation hints must make sure to be in the alloc order.

2013-02-19T18:55:36Z

When creating an allocation hint for a register pair, make sure the hint for the physical register reference is still in the allocation order. rdar://13240556 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175541 91177308-0d34-0410-b5e6-96231b3b80d8

FileCheck-ify some grep tests

2013-01-25T22:11:46Z

These tests in particular try to use escaped square brackets as an argument to grep, which is failing for me with native win32 python. It appears the backslash is being lost near the CreateProcess*() call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173506 91177308-0d34-0410-b5e6-96231b3b80d8

Remove some register allocation order dependencies.

2013-01-19T00:03:32Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172874 91177308-0d34-0410-b5e6-96231b3b80d8

On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,

2012-12-20T19:59:30Z

are more expensive than the non-flag setting variant. Teach thumb2 size reduction pass to avoid generating them unless we are optimizing for size. rdar://12892707 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170728 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typos in CHECK lines.

2012-12-06T21:24:47Z

Patch by Alexander Zinenko. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169547 91177308-0d34-0410-b5e6-96231b3b80d8