llvm/test/CodeGen/SPARC, branch release_29 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/SPARC?h=release_29 2011-02-21T03:42:44Z Generate correct Sparc32 ABI compliant code for functions that return a struct. 2011-02-21T03:42:44Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-02-21T03:42:44Z urn:sha1:58269b973256bf2436cac0f047aa277fe4bc01dd git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126108 91177308-0d34-0410-b5e6-96231b3b80d8 Prevent IMPLICIT_DEF/KILL to become a delay filler instruction in SPARC backend. 2011-02-12T19:02:33Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-02-12T19:02:33Z urn:sha1:cc5bd4a56140f8c7381afa686f28b361fd540436 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125444 91177308-0d34-0410-b5e6-96231b3b80d8 Pass sret arguments through the stack instead of through registers in Sparc backend. It makes the code generated more compliant with the sparc32 ABI. 2011-01-22T13:05:16Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-22T13:05:16Z urn:sha1:8184e289db45acd0bd8bbf7087f7a1274ef55f15 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124030 91177308-0d34-0410-b5e6-96231b3b80d8 Added ICC, FCC as uses of movcc instruction to generate correct code when -mattr=v9 is used. 2011-01-22T11:36:24Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-22T11:36:24Z urn:sha1:e105a3901fecce76e789566ecbfbc87a5b4ce899 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124027 91177308-0d34-0410-b5e6-96231b3b80d8 Sparc backend: 2011-01-21T22:00:00Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-21T22:00:00Z urn:sha1:fc3faa75cbadd8a1020941ec85adfda1d2f49688 Rename FLUSH to FLUSHW. Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8 Implement support for byval arguments in Sparc backend. 2011-01-21T14:00:01Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-21T14:00:01Z urn:sha1:46713296e0da8f413b94b9c2b82b079e6e3bd6e2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123974 91177308-0d34-0410-b5e6-96231b3b80d8 Sparc backend: Implements a delay slot filler that attempt to fill delay slots 2011-01-20T05:08:26Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-20T05:08:26Z urn:sha1:71e39dac0ce9676dd3d0a92164167e18499d40fa with useful instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123884 91177308-0d34-0410-b5e6-96231b3b80d8 Implement AnalyzeBranch in Sparc Backend. 2011-01-16T03:15:11Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-16T03:15:11Z urn:sha1:c1a62834a2ad33a80ca2b1f3a549f4f7806cd320 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123561 91177308-0d34-0410-b5e6-96231b3b80d8 Implement RETURNADDR and FRAMEADDR lowering in SPARC backend. 2011-01-12T05:08:36Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-12T05:08:36Z urn:sha1:860b64cb1efba110bf81bcc243a6fbaae4c655a4 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8 Fix SPARC backend call instruction so that arguments passed through registers 2011-01-12T03:18:21Z Venkatraman Govindaraju venkatra@cs.wisc.edu 2011-01-12T03:18:21Z urn:sha1:7d29ffbe5b091fae03afd264d8c8b0090c7a45f4 are correctly marked as used instead of passing all possible argument registers as used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123301 91177308-0d34-0410-b5e6-96231b3b80d8