llvm/test/CodeGen/R600, branch stablehttp://llvm.orghttps://git.amat.us/llvm/atom/test/CodeGen/R600?h=stable2013-04-01T21:48:05ZR600: Add support for native control flow2013-04-01T21:48:05ZVincent Lejeunevljn@ovi.com2013-04-01T21:48:05Zurn:sha1:08001a5a1565adb8ce18b97537dd75075992d09a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178505 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Emit CF_ALU and use true kcache register.2013-04-01T21:47:42ZVincent Lejeunevljn@ovi.com2013-04-01T21:47:42Zurn:sha1:8e59191eb8033133f5b2923d2056d4362af913ce
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178503 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: add SETO/SETUO patterns2013-03-27T15:27:31ZChristian Konigchristian.koenig@amd.com2013-03-27T15:27:31Zurn:sha1:00b3b5fbf4d07cd4c846daebda32686cbb1d9952
6 more piglit tests.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178145 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: add cummuting of rev instructions2013-03-27T09:12:59ZChristian Konigchristian.koenig@amd.com2013-03-27T09:12:59Zurn:sha1:e49230895d9c666b84beaa748259fbf1f6715122
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178127 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: add mulhu/mulhs patterns2013-03-27T09:12:51ZChristian Konigchristian.koenig@amd.com2013-03-27T09:12:51Zurn:sha1:45b14e341a8a85e877d001bbd43f5e2b25b61cb8
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178126 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: add srl/sha patterns for SI2013-03-27T09:12:44ZChristian Konigchristian.koenig@amd.com2013-03-27T09:12:44Zurn:sha1:a62b1a149ad1c6785700ef4deb53f835d5646e59
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178125 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: mark most intrinsics as readnone v22013-03-26T14:03:57ZChristian Konigchristian.koenig@amd.com2013-03-26T14:03:57Zurn:sha1:f62300812230116b517f3b3f5bd8497d317b4a1f
They read from constant register space anyway.
v2: fix lit tests
Signed-off-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178020 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Fix up test/CodeGen/R600/llvm.pow.ll for r1777302013-03-22T15:24:16ZMichel Danzermichel.daenzer@amd.com2013-03-22T15:24:16Zurn:sha1:21675c8ab0e2ec788caed6c0d88b20f6e5ebdbda
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177736 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Factorize code handling Const Read Port limitation2013-03-14T15:50:45ZVincent Lejeunevljn@ovi.com2013-03-14T15:50:45Zurn:sha1:3ab0ba3cd8a499ebcc7eda3d7585c5ab4e7f0711
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177078 91177308-0d34-0410-b5e6-96231b3b80d8
llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts.2013-03-11T23:16:30ZNAKAMURA Takumigeek4civic@gmail.com2013-03-11T23:16:30Zurn:sha1:7e6274dc66895c11a5743dad7d95a2a255819f91
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176835 91177308-0d34-0410-b5e6-96231b3b80d8