llvm/test/CodeGen/R600, branch master

R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns

2013-05-10T02:09:45Z

The BFE optimization was the only one we were actually using, and it was emitting an intrinsic that we don't support. https://bugs.freedesktop.org/show_bug.cgi?id=64201 Reviewed-by: Christian König NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181580 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Expand SUB for v2i32/v4i32

2013-05-10T02:09:39Z

Patch by: Aaron Watry Reviewed-by: Tom Stellard Signed-off-by: Aaron Watry NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181579 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Expand MUL for v4i32/v2i32

2013-05-10T02:09:34Z

Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run. Patch by: Aaron Watry Reviewed-by: Tom Stellard Signed-off-by: Aaron Watry NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181578 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Expand SRA for v4i32/v2i32

2013-05-10T02:09:29Z

v2: Add v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard Signed-off-by: Aaron Watry NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181577 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Expand vselect for v4i32 and v2i32

2013-05-10T02:09:24Z

v2: Add vselect v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard Signed-off-by: Aaron Watry NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181576 91177308-0d34-0410-b5e6-96231b3b80d8

R600/SI: Add lit tests for llvm.SI.imageload and llvm.SI.resinfo intrinsics

2013-05-08T13:07:29Z

Adapted from the llvm.SI.sample test. Reviewed-by: Christian König git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181425 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Emit config values in register / value pairs

2013-05-06T17:50:51Z

Reviewed-by: Vincent Lejeune Tested-By: Aaron Watry git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181228 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Stop emitting the instruction type byte before each instruction

2013-05-06T17:50:44Z

Reviewed-by: Vincent Lejeune Tested-By: Aaron Watry git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181225 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Emit ISA for CALL_FS_* instructions

2013-05-06T17:50:26Z

Reviewed-by: Vincent Lejeune Tested-By: Aaron Watry git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181223 91177308-0d34-0410-b5e6-96231b3b80d8

R600: Expand vector or, shl, srl, and xor nodes

2013-05-03T17:21:31Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181035 91177308-0d34-0410-b5e6-96231b3b80d8