llvm/test/CodeGen/PowerPC, branch release_26http://llvm.orghttps://git.amat.us/llvm/atom/test/CodeGen/PowerPC?h=release_262009-08-18T00:18:39ZPowerPC inline asm was emitting two output operands2009-08-18T00:18:39ZDale Johannesendalej@apple.com2009-08-18T00:18:39Zurn:sha1:5cfd4ddece1b73a719830ae84eb74d491f87b9d5
for a single "m" constraint; this is wrong because the
opcode of a load or store would have to change in parallel.
This patch makes it always compute addresses into a register,
which is correct but not as efficient as possible. 7144566.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79292 91177308-0d34-0410-b5e6-96231b3b80d8
Remove HasCrazyBSS and add a flag in TAI to indicate that '.section' 2009-08-13T23:30:21ZBruno Cardoso Lopesbruno.cardoso@gmail.com2009-08-13T23:30:21Zurn:sha1:fdf229eda95a542fc34d5182e1a91a22789ba122
must be emitted for PowerPC-Linux '.bss' section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78958 91177308-0d34-0410-b5e6-96231b3b80d8
Revert 78892 and 78895, these break generating working executables on2009-08-13T17:03:38ZDaniel Dunbardaniel@zuster.org2009-08-13T17:03:38Zurn:sha1:b42dad4761968b4b052e72494ce1bf0c7b3aba3e
x86_64-apple-darwin10.
--- Reverse-merging r78895 into '.':
U test/CodeGen/PowerPC/2008-12-12-EH.ll
U lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U include/llvm/Target/DarwinTargetAsmInfo.h
U lib/Target/X86/X86TargetAsmInfo.cpp
U lib/Target/X86/X86TargetAsmInfo.h
U lib/Target/ARM/ARMTargetAsmInfo.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/ARMTargetAsmInfo.cpp
U lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U lib/Target/PowerPC/PPCTargetAsmInfo.h
U lib/Target/PowerPC/PPCTargetMachine.cpp
G lib/Target/DarwinTargetAsmInfo.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78919 91177308-0d34-0410-b5e6-96231b3b80d8
fix typo, add 10.6 version of test for my previous patch.2009-08-13T05:43:33ZChris Lattnersabre@nondot.org2009-08-13T05:43:33Zurn:sha1:bf04f7259212ced4964ab47e1286968951e2e7df
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78895 91177308-0d34-0410-b5e6-96231b3b80d8
add nounwind2009-08-12T05:44:03ZChris Lattnersabre@nondot.org2009-08-12T05:44:03Zurn:sha1:e14463832cd4bebc9c95981c74bf67085a521b60
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78791 91177308-0d34-0410-b5e6-96231b3b80d8
Make the big switch: Change MCSectionMachO to represent a section *semantically*2009-08-10T01:39:42ZChris Lattnersabre@nondot.org2009-08-10T01:39:42Zurn:sha1:ff4bc460c52c1f285d8a56da173641bf92d49e3f
instead of syntactically as a string. This means that it keeps track of the
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and
"attribute(section)", so we should now start getting errors about invalid
section attributes from the compiler instead of the assembler on darwin.
Still todo:
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
S_GB_ZEROFILL segment type?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78547 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r75663 (and r76805), as it is causing regressions on powerpc.2009-07-23T00:09:46ZDan Gohmangohman@apple.com2009-07-23T00:09:46Zurn:sha1:608ad24ac34c596869f4764c7c51a54c5db230f0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76823 91177308-0d34-0410-b5e6-96231b3b80d8
Add -march=ppc32 lines so that this test doesn't ever default to ppc64.2009-07-22T22:08:31ZDan Gohmangohman@apple.com2009-07-22T22:08:31Zurn:sha1:1c88efff020fcb8828f33ca27e93bc7a3c57d79d
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76805 91177308-0d34-0410-b5e6-96231b3b80d8
Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.2009-07-16T20:58:34ZJakob Stoklund Olesenstoklund@2pi.dk2009-07-16T20:58:34Zurn:sha1:57e599a46b7b1321f9af02d1cecb4fa6b34f8a52
The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
get the PPC stub temporary label from the mangler instead of 2009-07-15T02:56:53ZChris Lattnersabre@nondot.org2009-07-15T02:56:53Zurn:sha1:392db3e11d93990e5c8382776b91d73ef40db005
using horrible string hacking. This gives us a different label,
but it's just an assembler temporary, so the name doesn't matter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75733 91177308-0d34-0410-b5e6-96231b3b80d8