llvm/test/CodeGen/PowerPC, branch release_24http://llvm.orghttps://git.amat.us/llvm/atom/test/CodeGen/PowerPC?h=release_242008-10-01T19:46:30ZSplit this test and move it into target-specific directories.2008-10-01T19:46:30ZDan Gohmangohman@apple.com2008-10-01T19:46:30Zurn:sha1:e7aa7baa76e1e65323ffe25593bb9cb3b4fa343c
This fixes failures on configurations that don't have one or the
other targets enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56926 91177308-0d34-0410-b5e6-96231b3b80d8
Remove SelectionDag early allocation of registers2008-09-24T23:13:09ZDale Johannesendalej@apple.com2008-09-24T23:13:09Zurn:sha1:8e3455ba1734a64dc5a6884d4a5218d436da54e2
for earlyclobbers. Teach Local RA about earlyclobber,
and add some tests for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56592 91177308-0d34-0410-b5e6-96231b3b80d8
Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"2008-09-17T00:30:57ZBill Wendlingisanbard@gmail.com2008-09-17T00:30:57Zurn:sha1:7795932d41a84c921a5d348b7fa70f5d32e146d0
function with appropriate parameters. This allows us to support blocks on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56267 91177308-0d34-0410-b5e6-96231b3b80d8
On some targets, non-move instructions can become move instructions because of coalescing. e.g.2008-09-12T18:13:14ZEvan Chengevan.cheng@apple.com2008-09-12T18:13:14Zurn:sha1:ee9e1b0a855bfce7650899ae757f5ef96a19e95d
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1 // after coalescing vr0 with vr1
Update the value# of the destination register with the copy instruction if that happens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56165 91177308-0d34-0410-b5e6-96231b3b80d8
Testcases for ppc atomics.2008-08-30T00:54:31ZDale Johannesendalej@apple.com2008-08-30T00:54:31Zurn:sha1:c4db7276e0055931bb29942d12a10494f569e749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55556 91177308-0d34-0410-b5e6-96231b3b80d8
In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN2008-08-28T21:04:05ZMon P Wangwangmp@apple.com2008-08-28T21:04:05Zurn:sha1:5ad0bf658aa1e3df4b15b64647a6f91e0641c294
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55499 91177308-0d34-0410-b5e6-96231b3b80d8
Adjust grep's for new code sequence.2008-08-25T18:53:58ZDale Johannesendalej@apple.com2008-08-25T18:53:58Zurn:sha1:8bb2ef4760560196a5731b43b2d99dc4d53ba662
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55320 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a catastrophic PPC64 ABI bug: i32 operands which are passed in memory (all of the parameter registers are used) are loaded from sp offsets that were off by 4.2008-07-24T08:17:07ZEvan Chengevan.cheng@apple.com2008-07-24T08:17:07Zurn:sha1:982a05955ae9cfa71b8c6f3e80fed8ce5b778a1e
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53979 91177308-0d34-0410-b5e6-96231b3b80d8
Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk2008-07-17T19:10:17ZDan Gohmangohman@apple.com2008-07-17T19:10:17Zurn:sha1:e8be6c63915e0389f1eef6b53c64300d13b2ce99
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.
Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.
This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.
These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53728 91177308-0d34-0410-b5e6-96231b3b80d8
LegalizeTypes support for what seems to be the2008-07-17T17:35:14ZDuncan Sandsbaldrick@free.fr2008-07-17T17:35:14Zurn:sha1:79ada108dd0d85af15d301be5479992a2d54e5ba
only missing ppc long double operations: FNEG
and FP_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53723 91177308-0d34-0410-b5e6-96231b3b80d8