llvm/test/CodeGen/Mips, branch release_33 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/Mips?h=release_33 2013-05-03T23:17:24Z Remove some uneeded pseudos in the presence of the naked function attribute. 2013-05-03T23:17:24Z Reed Kotler rkotler@mips.com 2013-05-03T23:17:24Z urn:sha1:2bb955a6931580c9bb0472aa29b3fbbabe263295 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181072 91177308-0d34-0410-b5e6-96231b3b80d8 [mips] Split the DSP control register and define one register for each field of 2013-05-03T18:37:49Z Akira Hatanaka ahatanaka@mips.com 2013-05-03T18:37:49Z urn:sha1:a2b2200ff8684ba23c64b24c0128a78f4b6e3c73 its fields. This removes false dependencies between DSP instructions which access different fields of the the control register. Implicit register operands are added to instructions RDDSP and WRDSP after instruction selection, depending on the value of the mask operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181041 91177308-0d34-0410-b5e6-96231b3b80d8 [mips] Handle reading, writing or copying of ccond field of DSP control 2013-05-02T23:07:05Z Akira Hatanaka ahatanaka@mips.com 2013-05-02T23:07:05Z urn:sha1:99ad6ac65e8c97a0d3c9d884285dda01f793b7d1 register. - Define pseudo instructions which store or load ccond field of the DSP control register. - Emit the pseudos in MipsSEInstrInfo::storeRegToStack and loadRegFromStack. - Expand the pseudos before callee-scan save. - Emit instructions RDDSP or WRDSP to copy between ccond field and GPRs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180969 91177308-0d34-0410-b5e6-96231b3b80d8 [mips] Fix handling of instructions which copy to/from accumulator registers. 2013-04-30T23:22:09Z Akira Hatanaka ahatanaka@mips.com 2013-04-30T23:22:09Z urn:sha1:c147c1b994e1187cb471cdb7ee05f5f875eff4e0 Expand copy instructions between two accumulator registers before callee-saved scan is done. Handle copies between integer GPR and hi/lo registers in MipsSEInstrInfo::copyPhysReg. Delete pseudo-copy instructions that are not needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180827 91177308-0d34-0410-b5e6-96231b3b80d8 [mips] Instruction selection patterns for DSP-ASE vector select and compare 2013-04-30T22:37:26Z Akira Hatanaka ahatanaka@mips.com 2013-04-30T22:37:26Z urn:sha1:cd6c57917db22a3913a2cdbadfa79fed3547bdec instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180820 91177308-0d34-0410-b5e6-96231b3b80d8 TBAA: remove !tbaa from testing cases if not used. 2013-04-30T17:52:57Z Manman Ren mren@apple.com 2013-04-30T17:52:57Z urn:sha1:2dc50d306752c8672d1543feb88517705cdb25e7 This will make it easier to turn on struct-path aware TBAA since the metadata format will change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180796 91177308-0d34-0410-b5e6-96231b3b80d8 [mips] In performDSPShiftCombine, check that all elements in the vector are 2013-04-22T19:58:23Z Akira Hatanaka ahatanaka@mips.com 2013-04-22T19:58:23Z urn:sha1:d597263b9442923bacc24f26a8510fb69f992864 shifted by the same amount and the shift amount is smaller than the element size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180039 91177308-0d34-0410-b5e6-96231b3b80d8 Cleanup: test source files do not need to be executable 2013-04-22T08:02:43Z Arnaud A. de Grandmaison arnaud.adegm@gmail.com 2013-04-22T08:02:43Z urn:sha1:d9e70873f38e734f37ed8b7ce75839b25e3eada5 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180003 91177308-0d34-0410-b5e6-96231b3b80d8 [mips] Instruction selection patterns for DSP-ASE vector shifts. 2013-04-19T23:21:32Z Akira Hatanaka ahatanaka@mips.com 2013-04-19T23:21:32Z urn:sha1:97a62bf2a4a2d141aad8af3531c3b69934f134c1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179906 91177308-0d34-0410-b5e6-96231b3b80d8 [mips] Reapply r179420 and r179421. 2013-04-13T00:55:41Z Akira Hatanaka ahatanaka@mips.com 2013-04-13T00:55:41Z urn:sha1:3d60241c3e86973be281660bc5971c3a46cfdc47 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179434 91177308-0d34-0410-b5e6-96231b3b80d8