llvm/test/CodeGen/CellSPU, branch release_26

Add some generic expansion logic for SMULO and UMULO. Fixes UMULO

2009-06-16T06:58:29Z

support for x86, and UMULO/SMULO for many architectures, including PPC (PR4201), ARM, and Cell. The resulting expansion isn't perfect, but it's not bad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73477 91177308-0d34-0410-b5e6-96231b3b80d8

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04T22:49:04Z

integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8

Revert 67132. This is breaking some objective-c apps.

2009-03-25T20:20:11Z

Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67701 91177308-0d34-0410-b5e6-96231b3b80d8

Don't force promotion of return arguments on the callee.

2009-03-17T23:43:59Z

Some architectures (like x86) don't require it. This fixes bug 3779. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67132 91177308-0d34-0410-b5e6-96231b3b80d8

CellSPU:

2009-03-17T16:45:16Z

Revert inadvertent mis-fix of fneg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67084 91177308-0d34-0410-b5e6-96231b3b80d8

CellSPU:

2009-03-17T01:15:45Z

- Fix fabs, fneg for f32 and f64. - Use BuildVectorSDNode.isConstantSplat, now that the functionality exists - Continue to improve i64 constant lowering. Lower certain special constants to the constant pool when they correspond to SPU's shufb instruction's special mask values. This avoids the overhead of performing a shuffle on a zero-filled vector just to get the special constant when the memory load suffices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67067 91177308-0d34-0410-b5e6-96231b3b80d8

CellSPU:

2009-03-16T18:47:25Z

Incorporate Tilmann's 128-bit operation patch. Evidently, it gets the llvm-gcc bootstrap a bit further along. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67048 91177308-0d34-0410-b5e6-96231b3b80d8

Used "-enable-unsafe-fp-math" to allow this transformation - (a * b -c) = c - a *b.

2009-01-31T06:50:54Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63475 91177308-0d34-0410-b5e6-96231b3b80d8

CellSPU:

2009-01-26T03:31:40Z

- Rename fcmp.ll test to fcmp32.ll, start adding new double tests to fcmp64.ll - Fix select_bits.ll test - Capitulate to the DAGCombiner and move i64 constant loads to instruction selection (SPUISelDAGtoDAG.cpp). DAGCombiner will insert all kinds of 64-bit optimizations after operation legalization occurs and now we have to do most of the work that instruction selection should be doing twice (once to determine if v2i64 build_vector can be handled by SelectCode(), which then runs all of the predicates a second time to select the necessary instructions.) But, CellSPU is a good citizen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62990 91177308-0d34-0410-b5e6-96231b3b80d8

Don't rely on grep -w working.

2009-01-21T09:41:42Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62682 91177308-0d34-0410-b5e6-96231b3b80d8