llvm/test/CodeGen/CellSPU, branch release_23 http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/CellSPU?h=release_23 2008-04-28T23:26:22Z Update and_ops.ll according to the recent dagcombiner changes. 2008-04-28T23:26:22Z Dan Gohman gohman@apple.com 2008-04-28T23:26:22Z urn:sha1:1d7153976c04723127bf6269b33a8ba81ae874d5 Add a new test, and_ops_more.ll, which is XFAIL'd, to record the parts of and_ops.ll that were affected by this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50379 91177308-0d34-0410-b5e6-96231b3b80d8 Upgrade these tests for the current intrinsic prototypes. 2008-04-14T18:19:18Z Dan Gohman gohman@apple.com 2008-04-14T18:19:18Z urn:sha1:63f7ba085f2ce561663656dcc81ef81ae9654358 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49669 91177308-0d34-0410-b5e6-96231b3b80d8 Add more patterns to match in the integer comparison test harnesses. 2008-03-20T00:51:36Z Scott Michel scottm@aero.org 2008-03-20T00:51:36Z urn:sha1:79698f60c4693ba305ba994b8349a3f6a6d6031e Fix bugs encountered, mostly due to range matching for immediates; the CellSPU's 10-bit immediates are sign extended, covering a larger range of unsigned values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48575 91177308-0d34-0410-b5e6-96231b3b80d8 - Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency. 2008-03-10T23:49:09Z Scott Michel scottm@aero.org 2008-03-10T23:49:09Z urn:sha1:405fba12ce4874e0b599b19168b1d29d1c64ffab - Add test pattern matching in CellSPU's icmp32.ll test harness - Fix CellSPU fcmp.ll-generated assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48197 91177308-0d34-0410-b5e6-96231b3b80d8 Integer comparison tests for CellSPU. 2008-03-10T16:58:52Z Scott Michel scottm@aero.org 2008-03-10T16:58:52Z urn:sha1:78c47fa50b903d5dcb4e07a5c048a35cbc2add9e git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8 Refine Cell's i64 constant generation code to cover more constants where the 2008-03-06T04:02:54Z Scott Michel scottm@aero.org 2008-03-06T04:02:54Z urn:sha1:4cb8bd8effdc999128d9ab82e1b2fe860b01c556 upper and lower 32-bits are the same (in addition to 0 and -1 previously.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47985 91177308-0d34-0410-b5e6-96231b3b80d8 - Expand tabs to spaces. 2008-03-05T23:00:19Z Scott Michel scottm@aero.org 2008-03-05T23:00:19Z urn:sha1:53dec47f3b6ab0f4fdc533b422c6cf404d5d6771 - select_bits.ll now fully functional now that PR1993 is closed. It was previously broken by refactoring in SPUInstrInfo.td and using multiclasses. - Same for eqv.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47972 91177308-0d34-0410-b5e6-96231b3b80d8 Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23T18:41:37Z Scott Michel scottm@aero.org 2008-02-23T18:41:37Z urn:sha1:a59d469e9b31087f0f045bcb5d1a154c963be9b7 for CellSPU modifications: - SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend. - Other improvements based on refactoring effort in SPUISelLowering.cpp, esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and rotates are now eliminiated, other scalar-to-vector-to-scalar silliness is also eliminated. - 64-bit operations are being implemented, _muldi3.c gcc runtime now compiles and generates the right code. More work still needs to be done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47532 91177308-0d34-0410-b5e6-96231b3b80d8 Overhaul Cell SPU's addressing mode internals so that there are now 2008-01-29T02:16:57Z Scott Michel scottm@aero.org 2008-01-29T02:16:57Z urn:sha1:053c1da8d956a794d158ac906b3927c923f97c4d only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8 remove extraneous &&'s from tests, as Scott is apparently not going to. 2008-01-18T19:53:43Z Chris Lattner sabre@nondot.org 2008-01-18T19:53:43Z urn:sha1:994d6cfb3d3b942200073e2f88900708f0c16e9c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46173 91177308-0d34-0410-b5e6-96231b3b80d8