http://llvm.org https://git.amat.us/llvm/atom/test/CodeGen/CellSPU?h=release_22 2008-01-11T21:01:19Z 2008-01-11T21:01:19Z Scott Michel scottm@aero.org 2008-01-11T21:01:19Z urn:sha1:497e888daf9ba6489928e1153804ed12a7fe44c5 - struct_2.ll: Completely unaligned load/store testing - call_indirect.ll, struct_1.ll: Add test lines to exercise X-form [$reg($reg)] addressing At this point, loads and stores should be under control (he says in an optimistic tone of voice.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45882 91177308-0d34-0410-b5e6-96231b3b80d8 2008-01-11T02:53:15Z Scott Michel scottm@aero.org 2008-01-11T02:53:15Z urn:sha1:9de5d0dd42463f61c4ee2f9db5f3d08153c0dacf - Cleaned up custom load/store logic, common code is now shared [see note below], cleaned up address modes - More test cases: various intrinsics, structure element access (load/store test), updated target data strings, indirect function calls. Note: This patch contains a refactoring of the LoadSDNode and StoreSDNode structures: they now share a common base class, LSBaseSDNode, that provides an interface to their common functionality. There is some hackery to access the proper operand depending on the derived class; otherwise, to do a proper job would require finding and rearranging the SDOperands sent to StoreSDNode's constructor. The current refactor errs on the side of being conservatively and backwardly compatible while providing functionality that reduces redundant code for targets where loads and stores are custom-lowered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45851 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-20T00:44:13Z Scott Michel scottm@aero.org 2007-12-20T00:44:13Z urn:sha1:86c041f50e17f7fcd18193ff49e58379924d6472 - vec_const.ll: Vector constant loads - immed64.ll: i64, f64 constant loads git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45242 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-19T21:17:42Z Scott Michel scottm@aero.org 2007-12-19T21:17:42Z urn:sha1:0e5665bf0314b609bfa08bb64bad834e7678c8a6 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45219 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-19T20:50:49Z Scott Michel scottm@aero.org 2007-12-19T20:50:49Z urn:sha1:0a92af487b8ae5d004a3460e3518a3815d9b36a8 - call.ll: Function call - ctpop.ll: Count population - dp_farith.ll: DP arithmetic - eqv.ll: Equivalence primitives - fcmp.ll: SP comparisons - fdiv.ll: SP division - fneg-fabs.ll: SP negation, aboslute value - int2fp.ll: Integer -> SP conversion - rotate_ops.ll: Rotation primitives - select_bits.ll: (a & c) | (b & ~c) bit selection - shift_ops.ll: Shift primitives - sp_farith.ll: SP arithmentic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45217 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-19T20:15:47Z Scott Michel scottm@aero.org 2007-12-19T20:15:47Z urn:sha1:170783a5fc13fff2878d4d347d8bd9096f2ef8d9 (vector insertions) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45216 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-19T07:35:06Z Scott Michel scottm@aero.org 2007-12-19T07:35:06Z urn:sha1:9999e685ea86e9cb8c8d59bfb2f3f4c20acc4de4 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45196 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-17T23:45:52Z Scott Michel scottm@aero.org 2007-12-17T23:45:52Z urn:sha1:4a5b66bc2f20e290a00cd215bfe4acb17fe464a9 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45134 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-17T22:32:34Z Scott Michel scottm@aero.org 2007-12-17T22:32:34Z urn:sha1:504c369213efb263136bb048e79af3516511c040 - New test case: nand.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45130 91177308-0d34-0410-b5e6-96231b3b80d8 2007-12-15T00:38:50Z Scott Michel scottm@aero.org 2007-12-15T00:38:50Z urn:sha1:ec2a08ff061af36b46160e475362959f21663e76 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45050 91177308-0d34-0410-b5e6-96231b3b80d8