llvm/test/CodeGen/ARM, branch release_30

Merging r142869:

2011-10-24T23:06:48Z

------------------------------------------------------------------------ r142869 | void | 2011-10-24 16:05:43 -0700 (Mon, 24 Oct 2011) | 4 lines Check the visibility of the global variable before placing it into the stubs table. A hidden variable could potentially end up in both lists. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142870 91177308-0d34-0410-b5e6-96231b3b80d8

Add missing correctness check to ARMTargetLowering::ReconstructShuffle. Fixes PR11129.

2011-10-14T23:58:49Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142022 91177308-0d34-0410-b5e6-96231b3b80d8

Fix -widen-vmovs liveness issues.

2011-10-12T00:06:23Z

When widening a copy, we are reading a larger register that may not be live. Use an flag to tell the register scavenger and machine code verifier that we know the value isn't defined. We now widen: %S6 = COPY %S4, %D3 into: %D3 = VMOVD %D2, pred:14, pred:%noreg, %S4 This also keeps the flag on %S4 so we don't inadvertently kill a live value in %S5. Finally, ensure that ARMBaseInstrInfo::setExecutionDomain() preserves the flag when converting VMOVD to VORR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141746 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new wrapper node for a DILexicalBlock that encapsulates it and a

2011-10-11T22:59:11Z

file. Since it should only be used when necessary propagate it through the backend code generation and tweak testcases accordingly. This helps with code like in clang's test/CodeGen/debug-info-line.c where we have multiple #line directives within a single lexical block and want to generate only a single block that contains each file change. Part of rdar://10246360 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141729 91177308-0d34-0410-b5e6-96231b3b80d8

Add dominance check for the instruction being hoisted.

2011-10-11T18:09:58Z

For example, MachineLICM should not hoist a load that is not guaranteed to be executed. Radar 10254254. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141689 91177308-0d34-0410-b5e6-96231b3b80d8

Test simplification that Ana Pazos noticed.

2011-10-11T04:43:15Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141644 91177308-0d34-0410-b5e6-96231b3b80d8

Add testcase for PR11107.

2011-10-11T00:26:57Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141607 91177308-0d34-0410-b5e6-96231b3b80d8

Revert r141569 and r141576.

2011-10-10T23:18:02Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141594 91177308-0d34-0410-b5e6-96231b3b80d8

Reapply r141365 now that PR11107 is fixed.

2011-10-10T22:59:55Z

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141591 91177308-0d34-0410-b5e6-96231b3b80d8

Add dominance check for the instruction being hoisted.

2011-10-10T19:09:20Z

For example, MachineLICM should not hoist a load that is not guaranteed to be executed. Radar 10254254. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141569 91177308-0d34-0410-b5e6-96231b3b80d8